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coreboot-kgpe-d16/src/northbridge/intel/pineview
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Angel Pons ff254ea60b nb/intel/pineview: Drop unused GPIO32 macro 
It's not used, and GPIO registers are on the southbridge.

Change-Id: I0b7b6edc22d461007f24618eca42091439a53d3c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45423
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-18 10:14:56 +00:00
..
acpi nb/intel/pineview: Use common {DMI,EP,MCH}BAR accessors 2021-02-10 07:29:46 +00:00
acpi.c nb/intel/pineview: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:12:32 +00:00
bootblock.c nb/intel/pineview: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:12:32 +00:00
chip.h
early_init.c nb/intel/pineview: Use common {DMI,EP,MCH}BAR accessors 2021-02-10 07:29:46 +00:00
gma.c src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers 2020-08-17 07:00:37 +00:00
hostbridge_regs.h nb/intel/pineview/hostbridge_regs.h: Clean up registers 2020-08-03 05:27:28 +00:00
Kconfig nb/intel/pineview: Use common {DMI,EP,MCH}BAR accessors 2021-02-10 07:29:46 +00:00
Makefile.inc
mchbar_regs.h nb/intel/pineview: Rewrite hex values in lowercase 2021-02-07 21:59:51 +00:00
memmap.c nb/intel: Add missing <types.h> 2021-02-16 20:56:56 +00:00
northbridge.c nb/intel/pineview: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:12:32 +00:00
pineview.h nb/intel/pineview: Drop unused GPIO32 macro 2021-02-18 10:14:56 +00:00
raminit.c nb/intel/pineview: Rewrite hex values in lowercase 2021-02-07 21:59:51 +00:00
raminit.h nb/intel/pineview: Place raminit definitions in raminit.h 2020-09-25 19:42:43 +00:00
romstage.c