f7381f8cd1
Two new nvram variables control disabling the two non-ME NICs on the mainboard. This is implemented by disabling their PCIe bridge. Change-Id: I086f0d79de3ad0b53fa0ec40648d63378070e3bd Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/3870 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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.. | ||
arch | ||
console | ||
cpu | ||
device | ||
drivers | ||
ec | ||
include | ||
lib | ||
mainboard | ||
northbridge | ||
southbridge | ||
superio | ||
vendorcode | ||
Kconfig |