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Wisley Chen f7d0f02b36 mb/google/soraka: Update DPTF parameters
Cloned from baseboard/dptf.asl and update the parameters for soraka.

1. Update DPTF CPU/TSR0/TSR1/TSR2 passive/critial trigger points.
   CPU: passive point:85, critial point:100
   TSR0: passive point:55, critial point:65
   TSR1: passive point:58, critial point:70
   TSR2: passive point:60, critial point:75
   TSR3: passive point:60, critial point:75

2. Set PL1 Max to 7W, and PL1 Min 4.5W

3. Change sampling period of thermal relationship table (TRT) setting
   CPU: 5 seconds
   TSR0: 30 seconds
   TSR1: 30 seconds
   TSR2: 8 seconds
   TSR3: 8 Seconds

BUG=b:65467566
TEST=build, boot on soraka, and verified by thermal team.
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>

Change-Id: I6af93fa358a037df2088213ee4df5e2cfd047590
Reviewed-on: https://review.coreboot.org/21453
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-09-13 19:31:26 +00:00
3rdparty Update vboot submodule to upstream master 2017-09-13 02:24:37 +00:00
Documentation Documentation: Update Lesson2.md 2017-09-05 03:54:54 +00:00
configs configs: Add intel/galileo test configurations 2017-06-20 18:10:47 +02:00
payloads Update vboot submodule to upstream master 2017-09-13 02:24:37 +00:00
src mb/google/soraka: Update DPTF parameters 2017-09-13 19:31:26 +00:00
util rmodtool: Increase limit on number of symbols 2017-09-13 19:25:14 +00:00
.checkpatch.conf Fix files with multiple newlines at the end. 2017-07-24 15:08:08 +00:00
.clang-format Provide coreboot coding style formalisation file for clang-format 2015-11-10 00:49:03 +01:00
.gitignore copy & update test routines from what-jenkins-does 2017-08-11 15:24:56 +00:00
.gitmodules Set up 3rdparty/libgfxinit 2016-10-29 01:35:03 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
MAINTAINERS MAINTAINERS: Update support list 2017-07-15 21:53:21 +00:00
Makefile Makefile: Include Makefile from site-local 2017-09-06 04:37:21 +00:00
Makefile.inc Makefile: Keep list of exported variables 2017-09-06 04:36:56 +00:00
README README: Update requirements 2017-06-27 17:04:32 +00:00
gnat.adc gnat.adc: Do not generate assertion code for Refined_Post 2016-10-29 01:33:31 +02:00
toolchain.inc toolchain.inc: Use -Wstack-usage only on gcc 2017-06-19 22:17:01 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * https://www.coreboot.org/Supported_Motherboards
 * https://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)
 * pkg-config
 * libssl-dev (openssl)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult https://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  https://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.