coreboot-kgpe-d16/src/soc/rockchip/rk3288/Makefile.inc
huang lin 08884e39cd rk3288: set cpu frequency up to 1.8GHz
before the rkclk_init(), we must set rk808
buck1 voltage up to 1300mv

BUG=chrome-os-partner:32716, chrome-os-partner:31896
TEST=Boot on veyron_pinky rev2,check the rk808 buck1 voltage 1300mv
     and check the cpu frequency up to 1.8GHz

Original-Change-Id: I6a8c6e35bd7cc6017f2def72876a9170977f206e
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/222957
Original-Reviewed-by: Doug Anderson <dianders@chromium.org>

(cherry picked from commit 2e7e7c265691250d4a1b3ff94fe70b0a05f23e16)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Iff89d959456dd4d36f4293435caf7b4f7bdaf6fd
Reviewed-on: http://review.coreboot.org/9260
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-04 15:05:12 +02:00

76 lines
2.1 KiB
Makefile

##
## This file is part of the coreboot project.
##
## Copyright 2014 Rockchip Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
IDBTOOL = util/rockchip/make_idb.py
#bootblock-y += bootblock.c
bootblock-y += cbmem.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
endif
bootblock-y += timer.c
bootblock-y += monotonic_timer.c
bootblock-y += clock.c
bootblock-y += spi.c
bootblock-y += media.c
bootblock-y += gpio.c
bootblock-y += i2c.c
bootblock-y += rk808.c
verstage-y += monotonic_timer.c
verstage-y += spi.c
verstage-y += timer.c
verstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
verstage-y += gpio.c
verstage-y += clock.c
verstage-y += i2c.c
verstage-y += media.c
romstage-y += cbmem.c
romstage-y += timer.c
romstage-y += monotonic_timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += i2c.c
romstage-y += clock.c
romstage-y += gpio.c
romstage-y += spi.c
romstage-y += media.c
romstage-y += sdram.c
romstage-y += pwm.c
ramstage-y += soc.c
ramstage-y += cbmem.c
ramstage-y += timer.c
ramstage-y += monotonic_timer.c
ramstage-y += i2c.c
ramstage-y += clock.c
ramstage-y += spi.c
ramstage-y += gpio.c
ramstage-y += media.c
ramstage-y += rk808.c
ramstage-y += pwm.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
cp $< $@
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
@$(IDBTOOL) --from=$< --to=$@ --enable-align