08884e39cd
before the rkclk_init(), we must set rk808 buck1 voltage up to 1300mv BUG=chrome-os-partner:32716, chrome-os-partner:31896 TEST=Boot on veyron_pinky rev2,check the rk808 buck1 voltage 1300mv and check the cpu frequency up to 1.8GHz Original-Change-Id: I6a8c6e35bd7cc6017f2def72876a9170977f206e Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/222957 Original-Reviewed-by: Doug Anderson <dianders@chromium.org> (cherry picked from commit 2e7e7c265691250d4a1b3ff94fe70b0a05f23e16) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Iff89d959456dd4d36f4293435caf7b4f7bdaf6fd Reviewed-on: http://review.coreboot.org/9260 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
76 lines
2.1 KiB
Makefile
76 lines
2.1 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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IDBTOOL = util/rockchip/make_idb.py
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#bootblock-y += bootblock.c
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bootblock-y += cbmem.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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bootblock-y += timer.c
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bootblock-y += monotonic_timer.c
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bootblock-y += clock.c
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bootblock-y += spi.c
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bootblock-y += media.c
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bootblock-y += gpio.c
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bootblock-y += i2c.c
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bootblock-y += rk808.c
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verstage-y += monotonic_timer.c
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verstage-y += spi.c
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verstage-y += timer.c
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verstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
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verstage-y += gpio.c
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verstage-y += clock.c
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verstage-y += i2c.c
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verstage-y += media.c
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romstage-y += cbmem.c
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romstage-y += timer.c
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romstage-y += monotonic_timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += i2c.c
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romstage-y += clock.c
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romstage-y += gpio.c
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romstage-y += spi.c
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romstage-y += media.c
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romstage-y += sdram.c
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romstage-y += pwm.c
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ramstage-y += soc.c
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ramstage-y += cbmem.c
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ramstage-y += timer.c
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ramstage-y += monotonic_timer.c
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ramstage-y += i2c.c
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ramstage-y += clock.c
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ramstage-y += spi.c
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ramstage-y += gpio.c
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ramstage-y += media.c
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ramstage-y += rk808.c
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ramstage-y += pwm.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
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cp $< $@
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf "Generating: $(subst $(obj)/,,$(@))\n"
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@mkdir -p $(dir $@)
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@$(IDBTOOL) --from=$< --to=$@ --enable-align
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