coreboot-kgpe-d16/src/cpu
Arthur Heymans 98c92570d9 cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm
C5, C6 and slfm depend on the southbridge and the northbridge to be able
to provide this functionality, with some just lacking the possibility to
do so. Move the devicetree configuration to the southbridge.

This removes the need for a magic lapic in the devicetree.

Change-Id: I4a9b1e684a7927259adae9b1d42a67e907722109
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-05 14:22:12 +00:00
..
amd cpu: Include <cpu/cpu.h> instead of <arch/cpu.h> 2022-11-08 14:38:28 +00:00
armltd Kconfig: comply to Linux 5.3's Kconfig language rules 2019-11-23 20:09:56 +00:00
intel cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm 2022-12-05 14:22:12 +00:00
power9 src/cpu/power9: add file structure for power9, implement SCOM access 2022-02-11 13:53:29 +00:00
qemu-power8 src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
qemu-x86 mb/qemu/x86: Remove option for LEGACY_SMP_INIT 2022-11-07 13:59:24 +00:00
x86 cpu/x86/Kconfig: Drop unused Kconfig symbol 2022-11-17 13:26:17 +00:00
Kconfig src/cpu: Remove unused symbols 2021-02-18 10:11:24 +00:00
Makefile.inc cpu/Makefile.inc: Fix rebuilding a new target 2022-06-17 14:26:55 +00:00