fbdb085549
Change all PCI configuration accesses to MMIO on all boards with SandyBridge and IvyBridge. To enable MMIO style access, add explicit PCI IO config write in the bootblock. Change-Id: I8f957a80bf57df000897c5a080dd5ff131b1ec0d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3576 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.huber@secunet.com>
47 lines
848 B
Text
47 lines
848 B
Text
if BOARD_GOOGLE_LINK
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_INTEL_SOCKET_RPGA989
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select NORTHBRIDGE_INTEL_IVYBRIDGE
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select SOUTHBRIDGE_INTEL_C216
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select BOARD_ROMSIZE_KB_8192
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select EC_GOOGLE_CHROMEEC
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_SMI_HANDLER
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select GFXUMA
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select CHROMEOS
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select EXTERNAL_MRC_BLOB
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select SERIRQ_CONTINUOUS_MODE
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select EARLY_CBMEM_INIT
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select MARK_GRAPHICS_MEM_WRCOMB
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config MAINBOARD_DIR
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string
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default google/link
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config MAINBOARD_PART_NUMBER
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string
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default "Link"
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config MMCONF_BASE_ADDRESS
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hex
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default 0xf0000000
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config IRQ_SLOT_COUNT
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int
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default 18
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config MAX_CPUS
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int
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default 8
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config VGA_BIOS_FILE
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string
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default "pci8086,0166.rom"
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endif # BOARD_GOOGLE_LINK
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