2527648d8c
Change-Id: I3108193c0e0b644cecb74ae0c7a7b54e24a75b58 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
286 lines
7.9 KiB
C
286 lines
7.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2011-2012 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <string.h>
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#include <cbfs.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <fmap.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <boot/coreboot_tables.h>
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#include "onboard.h"
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#include "ec.h"
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <ec/quanta/ene_kb3940q/ec.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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static unsigned int search(char *p, char *a, unsigned int lengthp,
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unsigned int lengtha)
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{
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int i, j;
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/* Searching */
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for (j = 0; j <= lengtha - lengthp; j++) {
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for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
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;
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if (i >= lengthp)
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return j;
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}
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return lengtha;
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}
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static unsigned char get_hex_digit(char *offset)
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{
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unsigned char retval = 0;
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retval = *offset - '0';
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if (retval > 0x09) {
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retval = *offset - 'A' + 0x0A;
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if (retval > 0x0F)
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retval = *offset - 'a' + 0x0a;
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}
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if (retval > 0x0F) {
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printk(BIOS_DEBUG, "Error: Invalid Hex digit found: %c - 0x%02x\n",
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*offset, (unsigned char)*offset);
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retval = 0;
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}
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return retval;
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}
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static int get_mac_address(u32 *high_dword, u32 *low_dword,
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u32 search_address, u32 search_length)
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{
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char key[] = "ethernet_mac";
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unsigned int offset;
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int i;
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offset = search(key, (char *)search_address,
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sizeof(key) - 1, search_length);
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if (offset == search_length) {
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printk(BIOS_DEBUG,
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"Error: Could not locate '%s' in VPD\n", key);
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return 0;
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}
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printk(BIOS_DEBUG, "Located '%s' in VPD\n", key);
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offset += sizeof(key); /* move to next character */
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*high_dword = 0;
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/* Fetch the MAC address and put the octets in the correct order to
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* be programmed.
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*
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* From RTL8105E_Series_EEPROM-Less_App_Note_1.1
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* If the MAC address is 001122334455h:
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* Write 33221100h to I/O register offset 0x00 via double word access
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* Write 00005544h to I/O register offset 0x04 via double word access
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*/
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for (i = 0; i < 4; i++) {
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*high_dword |= (get_hex_digit((char *)(search_address + offset))
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<< (4 + (i * 8)));
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*high_dword |= (get_hex_digit((char *)(search_address + offset + 1))
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<< (i * 8));
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offset += 3;
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}
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*low_dword = 0;
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for (i = 0; i < 2; i++) {
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*low_dword |= (get_hex_digit((char *)(search_address + offset))
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<< (4 + (i * 8)));
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*low_dword |= (get_hex_digit((char *)(search_address + offset + 1))
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<< (i * 8));
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offset += 3;
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}
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return *high_dword | *low_dword;
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}
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static void program_mac_address(u16 io_base, u32 search_address,
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u32 search_length)
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{
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/* Default MAC Address of A0:00:BA:D0:0B:AD */
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u32 high_dword = 0xD0BA00A0; /* high dword of mac address */
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u32 low_dword = 0x0000AD0B; /* low word of mac address as a dword */
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if (search_length != -1)
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get_mac_address(&high_dword, &low_dword, search_address,
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search_length);
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if (io_base) {
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printk(BIOS_DEBUG, "Realtek NIC io_base = 0x%04x\n", io_base);
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printk(BIOS_DEBUG, "Programming MAC Address\n");
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outb(0xc0, io_base + 0x50); /* Disable register protection */
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outl(high_dword, io_base);
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outl(low_dword, io_base + 0x04);
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outb(0x60, io_base + 54);
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outb(0x00, io_base + 0x50); /* Enable register protection again */
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}
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}
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static void program_keyboard_type(u32 search_address, u32 search_length)
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{
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char key[] = "keyboard_layout";
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char kbd_jpn[] = "xkb:jp::jpn";
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unsigned int offset;
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char kbd_type = EC_KBD_EN; /* Default keyboard type is English */
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if (search_length != -1) {
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/*
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* Search for keyboard_layout identifier
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* The only options in the EC are Japanese or English.
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* The English keyboard layout is actually used for multiple
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* different languages - English, Spanish, French... Because
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* of this the code only searches for Japanese, and sets the
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* keyboard type to English if Japanese is not found.
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*/
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offset = search(key, (char *)search_address, sizeof(key) - 1,
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search_length);
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if (offset != search_length) {
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printk(BIOS_DEBUG, "Located '%s' in VPD\n", key);
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offset += sizeof(key); /* move to next character */
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search_length = sizeof(kbd_jpn);
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offset = search(kbd_jpn, (char *)(search_address + offset),
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sizeof(kbd_jpn) - 1, search_length);
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if (offset != search_length)
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kbd_type = EC_KBD_JP;
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}
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} else
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printk(BIOS_DEBUG, "Error: Could not locate VPD area\n");
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printk(BIOS_DEBUG, "Setting Keyboard type in EC to ");
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printk(BIOS_DEBUG, (kbd_type == EC_KBD_JP) ? "Japanese" : "English");
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printk(BIOS_DEBUG, ".\n");
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ec_mem_write(EC_KBID_REG, kbd_type);
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}
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static void mainboard_init(struct device *dev)
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{
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u32 search_address = 0x0;
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size_t search_length = -1;
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u16 io_base = 0;
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struct device *ethernet_dev = NULL;
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void *vpd_file;
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if (IS_ENABLED(CONFIG_CHROMEOS)) {
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struct region_device rdev;
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if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) {
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vpd_file = rdev_mmap_full(&rdev);
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if (vpd_file != NULL) {
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search_length = region_device_sz(&rdev);
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search_address = (uintptr_t)vpd_file;
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}
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}
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} else {
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vpd_file = cbfs_boot_map_with_leak("vpd.bin", CBFS_TYPE_RAW,
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&search_length);
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if (vpd_file) {
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search_address = (unsigned long)vpd_file;
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} else {
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search_length = -1;
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search_address = 0;
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}
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}
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/* Initialize the Embedded Controller */
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butterfly_ec_init();
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/* Program EC Keyboard locale based on VPD data */
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program_keyboard_type(search_address, search_length);
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/* Get NIC's IO base address */
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ethernet_dev = dev_find_device(BUTTERFLY_NIC_VENDOR_ID,
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BUTTERFLY_NIC_DEVICE_ID, dev);
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if (ethernet_dev != NULL) {
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io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;
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/*
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* Battery life time - LAN PCIe should enter ASPM L1 to save
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* power when LAN connection is idle.
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* enable CLKREQ: LAN pci config space 0x81h=01
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*/
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pci_write_config8(ethernet_dev, 0x81, 0x01);
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}
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if (io_base) {
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/* Program MAC address based on VPD data */
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program_mac_address(io_base, search_address, search_length);
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/*
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* Program NIC LEDS
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*
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* RTL8105E Series EEPROM-Less Application Note,
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* Section 5.6 LED Mode Configuration
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*
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* Step1: Write C0h to I/O register 0x50 via byte access to
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* disable 'register protection'
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* Step2: Write xx001111b to I/O register 0x52 via byte access
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* (bit7 is LEDS1 and bit6 is LEDS0)
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* Step3: Write 0x00 to I/O register 0x50 via byte access to
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* enable 'register protection'
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*/
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outb(0xc0, io_base + 0x50); /* Disable protection */
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outb((BUTTERFLY_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52);
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outb(0x00, io_base + 0x50); /* Enable register protection */
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}
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}
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static int butterfly_onboard_smbios_data(struct device *dev, int *handle,
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unsigned long *current)
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{
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int len = 0;
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len += smbios_write_type41(
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current, handle,
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BOARD_TRACKPAD_NAME, /* name */
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BOARD_TRACKPAD_IRQ, /* instance */
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0, /* segment */
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BOARD_TRACKPAD_I2C_ADDR, /* bus */
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0, /* device */
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0); /* function */
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return len;
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}
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// mainboard_enable is executed as first thing after
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// enumerate_buses().
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static void mainboard_enable(struct device *dev)
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{
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dev->ops->init = mainboard_init;
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dev->ops->get_smbios_data = butterfly_onboard_smbios_data;
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dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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