159 lines
3.7 KiB
C
159 lines
3.7 KiB
C
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Intel BASEBOARD-RVP ITE EC specific configuration */
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#include "common.h"
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#include "it83xx_pd.h"
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#include "keyboard_scan.h"
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#include "pwm.h"
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#include "pwm_chip.h"
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#include "timer.h"
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#include "usb_pd_tcpm.h"
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/* USB-C TPCP Configuration */
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const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
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[TYPE_C_PORT_0] = {
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.bus_type = EC_BUS_TYPE_EMBEDDED,
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/* TCPC is embedded within EC so no i2c config needed */
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.drv = &it83xx_tcpm_drv,
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#ifdef CONFIG_INTEL_VIRTUAL_MUX
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.usb23 = TYPE_C_PORT_0_USB2_NUM | (TYPE_C_PORT_0_USB3_NUM << 4),
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#endif
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},
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#ifdef HAS_TASK_PD_C1
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[TYPE_C_PORT_1] = {
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.bus_type = EC_BUS_TYPE_EMBEDDED,
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/* TCPC is embedded within EC so no i2c config needed */
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.drv = &it83xx_tcpm_drv,
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#ifdef CONFIG_INTEL_VIRTUAL_MUX
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.usb23 = TYPE_C_PORT_1_USB2_NUM | (TYPE_C_PORT_1_USB3_NUM << 4),
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#endif
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},
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#endif /* HAS_TASK_PD_C1 */
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};
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BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_COUNT);
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/* Reset PD MCU */
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void board_reset_pd_mcu(void)
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{
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/* Not applicable for ITE TCPC */
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}
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uint16_t tcpc_get_alert_status(void)
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{
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/*
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* Since C0/C1 TCPC are embedded within EC, we don't need the
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* PDCMD tasks. The (embedded) TCPC status since chip driver
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* code handles its own interrupts and forward the correct
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* events to the PD_C0 task. See it83xx/intc.c
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*/
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return 0;
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}
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/* Keyboard scan setting */
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struct keyboard_scan_config keyscan_config = {
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.output_settle_us = 35,
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.debounce_down_us = 5 * MSEC,
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.debounce_up_us = 40 * MSEC,
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.scan_period_us = 3 * MSEC,
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.min_post_scan_delay_us = 1000,
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.poll_timeout_us = 100 * MSEC,
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.actual_key_mask = {
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0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
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0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
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},
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};
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/*
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* PWM HW channelx binding tachometer channelx for fan control.
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* Four tachometer input pins but two tachometer modules only,
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* so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or
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* [TACH_CH_TACH1A | TACH_CH_TACH1B]
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*/
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const struct fan_tach_t fan_tach[] = {
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[PWM_HW_CH_DCR0] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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[PWM_HW_CH_DCR1] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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[PWM_HW_CH_DCR2] = {
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.ch_tach = TACH_CH_TACH1A,
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.fan_p = 2,
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.rpm_re = 1,
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.s_duty = 1,
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},
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[PWM_HW_CH_DCR3] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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[PWM_HW_CH_DCR4] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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[PWM_HW_CH_DCR5] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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[PWM_HW_CH_DCR6] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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[PWM_HW_CH_DCR7] = {
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.ch_tach = TACH_CH_NULL,
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.fan_p = -1,
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.rpm_re = -1,
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.s_duty = -1,
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},
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};
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BUILD_ASSERT(ARRAY_SIZE(fan_tach) == PWM_HW_CH_TOTAL);
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/* PWM channels */
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const struct pwm_t pwm_channels[] = {
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[PWM_CH_FAN] = {
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.channel = PWM_HW_CH_DCR2,
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.flags = PWM_CONFIG_HAS_RPM_MODE,
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.freq_hz = 30000,
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.pcfsr_sel = PWM_PRESCALER_C7,
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},
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};
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BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
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#ifdef CONFIG_USBC_VCONN
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void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
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{
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/*
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* Setting VCONN low by disabling the power switch before
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* enabling the VCONN on respective CC line
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*/
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gpio_set_level(tcpc_gpios[port].vconn.cc1_pin,
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!tcpc_gpios[port].vconn.pin_pol);
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gpio_set_level(tcpc_gpios[port].vconn.cc2_pin,
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!tcpc_gpios[port].vconn.pin_pol);
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if (enabled)
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gpio_set_level((cc_pin != USBPD_CC_PIN_1) ?
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tcpc_gpios[port].vconn.cc2_pin :
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tcpc_gpios[port].vconn.cc1_pin,
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tcpc_gpios[port].vconn.pin_pol);
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}
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#endif
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