79 lines
1.7 KiB
C
79 lines
1.7 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Nucleo-F411RE development board configuration */
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#ifndef __BOARD_H
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#define __BOARD_H
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/* 84 MHz CPU/AHB/APB2 clock frequency (APB1 = 42 Mhz) */
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#define CPU_CLOCK 84000000
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#define CONFIG_FLASH_WRITE_SIZE STM32_FLASH_WRITE_SIZE_3300
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/* the UART console is on USART2 (PA2/PA3) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 2
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/* Optional features */
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#undef CONFIG_LID_SWITCH
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#undef CONFIG_HIBERNATE
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#define CONFIG_STM_HWTIMER32
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#define CONFIG_WATCHDOG_HELP
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#define CONFIG_TASK_PROFILING
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#undef CONFIG_ADC
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#define CONFIG_DMA_HELP
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#define CONFIG_I2C
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#undef CONFIG_UART_RX_DMA
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#define CONFIG_UART_TX_DMA_CH STM32_DMAS_USART2_TX
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#define CONFIG_UART_RX_DMA_CH STM32_DMAS_USART2_RX
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#define CONFIG_UART_TX_REQ_CH STM32_REQ_USART2_TX
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#define CONFIG_UART_RX_REQ_CH STM32_REQ_USART2_RX
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#define CONFIG_ACCELGYRO_BMI160
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#define CONFIG_CMD_ACCELS
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#define CONFIG_CMD_ACCEL_INFO
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#define CONFIG_CMD_FLASH
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/* I2C ports configuration */
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#define CONFIG_I2C_MASTER
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#define CONFIG_I2C_DEBUG
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#define I2C_PORT_MASTER 1
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#define I2C_PORT_SLAVE 0 /* needed for DMAC macros (ugh) */
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#define I2C_PORT_ACCEL I2C_PORT_MASTER
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 2
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#define TIM_WATCHDOG 11
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#define CONFIG_WP_ALWAYS
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#define CONFIG_FLASH_READOUT_PROTECTION
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/* ADC signal */
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enum adc_channel {
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ADC1_0 = 0,
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ADC1_1,
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ADC1_4,
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ADC1_8,
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/* Number of ADC channels */
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ADC_CH_COUNT
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};
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enum sensor_id {
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BASE_ACCEL = 0,
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BASE_GYRO,
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SENSOR_COUNT,
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};
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#include "gpio_signal.h"
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#endif /* !__ASSEMBLER__ */
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#endif /* __BOARD_H */
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