24 lines
719 B
Markdown
24 lines
719 B
Markdown
# Spike RISC-V emulator
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[Spike], also known as riscv-isa-sim, is a commonly used [RISC-V] emulator.
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## Installation
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- Download `riscv-fesvr` and `riscv-isa-sim` from <https://github.com/riscv/>
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- Apply the two patches in <https://github.com/riscv/riscv-isa-sim/pull/53>,
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which are necessary in order to have a serial console
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- Compile `riscv-fesvr` and then `riscv-isa-sim`
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## Building coreboot and running it in Spike
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- Configure coreboot and run `make` as usual
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- Run `util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf` to
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convert coreboot to an ELF that Spike can load
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- Run `spike -m1024 build/coreboot.elf`
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[Spike]: https://github.com/riscv/riscv-isa-sim
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[RISC-V]: https://riscv.org/
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