2019-03-05 19:24:14 +01:00
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;=----------------------------------------------------------------------------=;
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; GNU GPL OS/K ;
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; ;
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; Desc: Memory management from protected mode ;
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; (x86_64 architecture only) ;
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; ;
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; ;
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; Copyright © 2018-2019 The OS/K Team ;
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; ;
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; This file is part of OS/K. ;
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; ;
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; OS/K is free software: you can redistribute it and/or modify ;
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; it under the terms of the GNU General Public License as published by ;
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; the Free Software Foundation, either version 3 of the License, or ;
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; (at your option) any later version. ;
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; ;
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; OS/K is distributed in the hope that it will be useful, ;
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; but WITHOUT ANY WARRANTY; without even the implied warranty of ;
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;
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; GNU General Public License for more details. ;
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; ;
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; You should have received a copy of the GNU General Public License ;
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; along with OS/K. If not, see <https://www.gnu.org/licenses/>. ;
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;=----------------------------------------------------------------------------=;
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[BITS 32]
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; ---------------------------------------------------------------------------- ;
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; Constructor for the page tables in protected mode ;
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; ---------------------------------------------------------------------------- ;
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Setup_paging:
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;; Map the first PML4 entry to PDP table
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mov eax, PDP_table
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or eax, 0b11 ; present + writable
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mov [PML4_table], eax
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;; Map the first PDP entry to PD table
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mov eax, PD_table
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or eax, 0b11 ; present + writable
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mov [PDP_table], eax
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;; Map each PD entry to a 'huge' 2MiB page
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mov ecx, 0 ; counter variable
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.map_p2_table:
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;; map ecx-th PD entry to a huge page that starts at address 2MiB*ecx
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mov eax, 0x200000
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mul ecx ; start address of ecx-th page
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or eax, 0b10000011 ; present + writable + huge
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mov [PD_table + ecx * 8], eax
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inc ecx
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cmp ecx, 512 ; if counter == 512, the whole PD table is mapped
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jne .map_p2_table ; else map the next entry
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ret
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2019-03-05 19:54:14 +01:00
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; ---------------------------------------------------------------------------- ;
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; Enable long mode and paging ;
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; ---------------------------------------------------------------------------- ;
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Go64:
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;; Registering paging
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mov eax, PML4_table
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mov cr3, eax ; Load PML4 to cr3
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mov eax, cr4
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or eax, 1 << 5
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mov cr4, eax ; Enable PAE
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;; Activate long mode
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mov ecx, 0xC0000080 ; address of MSR
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rdmsr ; read MSR
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or eax, 1 << 8 ; LME = 1. (Long Mode Enable)
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wrmsr ; write MSR
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;; Enable paging
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mov eax, cr0
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or eax, 1 << 31 ; make MSR bit 31 (PG = Paging) to 1 :
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; |1|000000000000000000000000000000
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; |
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; `------ Paging bit
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mov cr0, eax
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ret
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