Idt in progress !
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@ -37,7 +37,9 @@ typedef struct IdtPtr_t IdtPtr_t;
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typedef struct Registers_t Registers_t;
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typedef struct Registers_t Registers_t;
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// -------------------------------------------------------------------------- //
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// -------------------------------------------------------------------------- //
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//
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#define interrupt(n) asm volatile ("int %0" : : "N" (n) : "cc", "memory") \
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// CPU features masks
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// CPU features masks
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enum {
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enum {
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FEAT_ECX_SSE3 = 1 << 0,
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FEAT_ECX_SSE3 = 1 << 0,
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@ -99,6 +101,41 @@ enum {
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FEAT_EDX_PBE = 1 << 31
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FEAT_EDX_PBE = 1 << 31
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};
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};
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static const char *IsrExceptions[32] = {
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"Divide Error Fault",
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"Debug Exception Trap",
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"Non-maskable Interrupt",
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"Breakpoint Trap",
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"Overflow Trap",
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"Bound Range Exceeded Fault",
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"Invalid Opcode Fault",
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"Device Not Available or No Math Coprocessor Fault",
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"Double Fault Abort",
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"Coprocessor Segment Overrun Fault",
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"Invalid TSS Fault",
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"Segment Not Present Fault",
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"Stack Segment fault",
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"General Protection Fault",
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"Page Fault",
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"Reserved",
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"x87 FPU Floating Point or Math Fault",
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"Alignment Check Fault",
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"Machine Check Abort",
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"SIMD Floating Point Fault",
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"Virtualization Exception Fault",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved"
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};
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struct IdtDescriptor_t {
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struct IdtDescriptor_t {
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ushort limit;
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ushort limit;
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ulong base;
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ulong base;
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@ -134,8 +171,8 @@ struct Registers_t
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// -------------------------------------------------------------------------- //
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// -------------------------------------------------------------------------- //
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void CpuIdtSetup(void);
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void CpuIdtSetup(void);
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void idtSet(uchar rank, ulong base, ushort selector, uchar flags);
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void IdtSetGate(uchar rank, ulong base, ushort selector, uchar flags);
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void isrHandler(Registers_t reg);
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void IdtHandler(ulong intNo);
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void disablePIC(void);
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void disablePIC(void);
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// -------------------------------------------------------------------------- //
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// -------------------------------------------------------------------------- //
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@ -1,37 +1,39 @@
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//----------------------------------------------------------------------------//
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//----------------------------------------------------------------------------//
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// GNU GPL OS/K //
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// GNU GPL OS/K //
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// //
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// //
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// Desc: Interrupt related functions //
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// Desc: Interrupt related functions //
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// //
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// //
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// //
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// //
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// Copyright © 2018-2019 The OS/K Team //
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// Copyright © 2018-2019 The OS/K Team //
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// //
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// //
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// This file is part of OS/K. //
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// This file is part of OS/K. //
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// //
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// //
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// OS/K is free software: you can redistribute it and/or modify //
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// OS/K is free software: you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation, either version 3 of the License, or //
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// the Free Software Foundation, either version 3 of the License, or //
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// any later version. //
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// any later version. //
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// //
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// //
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// OS/K is distributed in the hope that it will be useful, //
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// OS/K is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY//without even the implied warranty of //
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// but WITHOUT ANY WARRANTY//without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// GNU General Public License for more details. //
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// //
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// //
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// You should have received a copy of the GNU General Public License //
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// You should have received a copy of the GNU General Public License //
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// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
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// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
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//----------------------------------------------------------------------------//
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//----------------------------------------------------------------------------//
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#include <kernel/base.h>
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#include <kernel/base.h>
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#include <kernel/cpu.h>
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#include <kernel/cpu.h>
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#include <kernel/boot.h>
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#include <kernel/boot.h>
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#include <kernel/iomisc.h>
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#include <kernel/iomisc.h>
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#include <extras/buf.h>
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IdtEntry_t idt[256] = { 0 };
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IdtEntry_t idt[256] = { 0 };
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IdtPtr_t idtPtr;
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IdtPtr_t idtPtr;
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void CpuIdtSetup(void)
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void CpuIdtSetup(void)
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{
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{
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// XXX detect the APIC with cpuid !
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disablePIC();
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disablePIC();
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ushort codeSeg = (ushort)(ulong)BtLoaderInfo.codeSegment;
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ushort codeSeg = (ushort)(ulong)BtLoaderInfo.codeSegment;
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@ -41,37 +43,37 @@ void CpuIdtSetup(void)
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idtPtr.base = &idt;
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idtPtr.base = &idt;
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// Set IDT gates
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// Set IDT gates
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idtSet(0, (ulong)isr0, codeSeg, 0x8E);
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IdtSetGate(0, (ulong)isr0, codeSeg, 0x8E);
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idtSet(1, (ulong)isr1, codeSeg, 0x8E);
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IdtSetGate(1, (ulong)isr1, codeSeg, 0x8E);
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idtSet(2, (ulong)isr2, codeSeg, 0x8E);
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IdtSetGate(2, (ulong)isr2, codeSeg, 0x8E);
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idtSet(3, (ulong)isr3, codeSeg, 0x8E);
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IdtSetGate(3, (ulong)isr3, codeSeg, 0x8E);
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idtSet(4, (ulong)isr4, codeSeg, 0x8E);
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IdtSetGate(4, (ulong)isr4, codeSeg, 0x8E);
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idtSet(5, (ulong)isr5, codeSeg, 0x8E);
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IdtSetGate(5, (ulong)isr5, codeSeg, 0x8E);
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idtSet(6, (ulong)isr6, codeSeg, 0x8E);
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IdtSetGate(6, (ulong)isr6, codeSeg, 0x8E);
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idtSet(7, (ulong)isr7, codeSeg, 0x8E);
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IdtSetGate(7, (ulong)isr7, codeSeg, 0x8E);
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idtSet(8, (ulong)isr8, codeSeg, 0x8E);
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IdtSetGate(8, (ulong)isr8, codeSeg, 0x8E);
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idtSet(9, (ulong)isr9, codeSeg, 0x8E);
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IdtSetGate(9, (ulong)isr9, codeSeg, 0x8E);
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idtSet(10, (ulong)isr10, codeSeg, 0x8E);
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IdtSetGate(10, (ulong)isr10, codeSeg, 0x8E);
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idtSet(11, (ulong)isr11, codeSeg, 0x8E);
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IdtSetGate(11, (ulong)isr11, codeSeg, 0x8E);
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idtSet(12, (ulong)isr12, codeSeg, 0x8E);
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IdtSetGate(12, (ulong)isr12, codeSeg, 0x8E);
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idtSet(13, (ulong)isr13, codeSeg, 0x8E);
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IdtSetGate(13, (ulong)isr13, codeSeg, 0x8E);
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idtSet(14, (ulong)isr14, codeSeg, 0x8E);
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IdtSetGate(14, (ulong)isr14, codeSeg, 0x8E);
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//idtSet(15, (ulong)isr15, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(15, (ulong)isr15, codeSeg, 0x8E); // INTEL RESERVED
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idtSet(16, (ulong)isr16, codeSeg, 0x8E);
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IdtSetGate(16, (ulong)isr16, codeSeg, 0x8E);
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idtSet(17, (ulong)isr17, codeSeg, 0x8E);
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IdtSetGate(17, (ulong)isr17, codeSeg, 0x8E);
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idtSet(18, (ulong)isr18, codeSeg, 0x8E);
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IdtSetGate(18, (ulong)isr18, codeSeg, 0x8E);
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idtSet(19, (ulong)isr19, codeSeg, 0x8E);
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IdtSetGate(19, (ulong)isr19, codeSeg, 0x8E);
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idtSet(20, (ulong)isr20, codeSeg, 0x8E);
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IdtSetGate(20, (ulong)isr20, codeSeg, 0x8E);
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//idtSet(21, (ulong)isr21, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(21, (ulong)isr21, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(22, (ulong)isr22, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(22, (ulong)isr22, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(23, (ulong)isr23, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(23, (ulong)isr23, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(24, (ulong)isr24, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(24, (ulong)isr24, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(25, (ulong)isr25, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(25, (ulong)isr25, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(26, (ulong)isr26, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(26, (ulong)isr26, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(27, (ulong)isr27, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(27, (ulong)isr27, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(28, (ulong)isr28, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(28, (ulong)isr28, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(29, (ulong)isr29, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(29, (ulong)isr29, codeSeg, 0x8E); // INTEL RESERVED
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//idtSet(30, (ulong)isr30, codeSeg, 0x8E); INTEL RESERVED
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IdtSetGate(30, (ulong)isr30, codeSeg, 0x8E); // INTEL RESERVED
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// Load IDT
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// Load IDT
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DebugLog("[IdtSetup] Filled \n");
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DebugLog("[IdtSetup] Filled \n");
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@ -79,7 +81,7 @@ void CpuIdtSetup(void)
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DebugLog("[IdtSetup] Initialized !\n");
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DebugLog("[IdtSetup] Initialized !\n");
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}
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}
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void idtSet(uchar rank, ulong base, ushort selector, uchar flags)
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void IdtSetGate(uchar rank, ulong base, ushort selector, uchar flags)
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{
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{
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// Set Base Address
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// Set Base Address
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idt[rank].baseLow = base & 0xFFFF;
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idt[rank].baseLow = base & 0xFFFF;
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*val |= (1<<8);
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*val |= (1<<8);
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}
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}
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void isrHandler(Registers_t regs)
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void IdtHandler(ulong intNo)
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{
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{
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DebugLog("Interrupt %d !!! \n", regs.intNo);
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int irrecoverable = 0;
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char *exceptionMsg = "Unhandled ISR exception";
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if (intNo == 6 || intNo == 8 || intNo == 13) irrecoverable++;
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if (intNo < 32) exceptionMsg = IsrExceptions[intNo];
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if (irrecoverable) {
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KeStartPanic("Irrecoverable exception 0x%x : %s\n", intNo, exceptionMsg);
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} else {
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bprintf(BStdOut, "Exception 0x%x : %s\n", intNo, exceptionMsg);
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}
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return;
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return;
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}
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}
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@ -26,14 +26,13 @@
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global idtInit
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global idtInit
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extern idtPtr
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extern idtPtr
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extern isrHandler
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extern IdtHandler
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;;
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;;
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;; Loads the IDT
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;; Loads the IDT
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;;
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;;
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idtInit:
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idtInit:
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lidt [idtPtr]
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lidt [idtPtr]
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sti
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ret
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ret
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;;
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;;
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@ -46,13 +45,12 @@ isrPreHandler:
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mov ax, ds
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mov ax, ds
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push rax
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push rax
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call isrHandler
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call IdtHandler
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pop rax
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pop rax
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mov ds, ax
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mov ds, ax
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popAll
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popAll
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add rsp, 8
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sti
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sti
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iretq
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iretq
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@ -115,3 +113,18 @@ IsrWithErrCode 13
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;; Page Fault
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;; Page Fault
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IsrWithErrCode 14
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IsrWithErrCode 14
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;; Reserved
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IsrWithoutErrCode 15
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IsrWithoutErrCode 21
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IsrWithoutErrCode 22
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IsrWithoutErrCode 23
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IsrWithoutErrCode 24
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IsrWithoutErrCode 25
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IsrWithoutErrCode 26
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IsrWithoutErrCode 27
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IsrWithoutErrCode 28
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IsrWithoutErrCode 29
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IsrWithoutErrCode 30
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IsrWithoutErrCode 31
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IsrWithoutErrCode 32
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@ -45,8 +45,7 @@
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global isr%1
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global isr%1
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isr%1:
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isr%1:
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cli
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cli
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push byte 0
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mov rdi, %1
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push byte %1
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jmp isrPreHandler
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jmp isrPreHandler
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%endmacro
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%endmacro
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@ -54,6 +53,6 @@
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global isr%1
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global isr%1
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isr%1:
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isr%1:
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cli
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cli
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push byte %1
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mov rdi, %1
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jmp isrPreHandler
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jmp isrPreHandler
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%endmacro
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%endmacro
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@ -40,12 +40,6 @@ extern error_t IoInitVGABuffer(void);
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// ps/proc.c test function
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// ps/proc.c test function
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extern void pstest(void);
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extern void pstest(void);
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void bug(void)
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{
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asm volatile ("int %0" : : "N" (0) : "cc", "memory");
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}
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//
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//
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// Entry point of the Kaleid kernel
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// Entry point of the Kaleid kernel
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//
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//
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//MmPrintMemoryMap();
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//MmPrintMemoryMap();
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CpuIdtSetup();
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CpuIdtSetup();
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KeEnableIRQs();
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bug();
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long a = -1;
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DebugLog("%s", a);
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// End this machine's suffering
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// End this machine's suffering
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BFlushBuf(BStdOut);
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BFlushBuf(BStdOut);
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KeCrashSystem();
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KeCrashSystem();
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