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TSS works !

This commit is contained in:
Adrien Bourmault 2019-05-22 00:38:04 +02:00
parent 8716e896da
commit b6e39d4712
8 changed files with 179 additions and 146 deletions
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6
ChangeLog
View File

@ -93,3 +93,9 @@ IDT Overhaul
2019-05-14 @os-k-team <os-k-team@os-k.eu> 2019-05-14 @os-k-team <os-k-team@os-k.eu>
* Whole Project Tree : big reorganization * Whole Project Tree : big reorganization
* Makefile : dependencies automated * Makefile : dependencies automated
2019-05-21 @os-k-team <os-k-team@os-k.eu>
* VGA and Shell and bprintf: Color support
* GDT : CS and TSS works
* IDT : Double Fault and Stack Segment Fault have a separate stack
* Stack : guard pages are now fully functionnal

8
include/ke/idt.h
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@ -41,7 +41,7 @@ struct IdtEntry_t
{ {
ushort baseLow; ushort baseLow;
ushort selector; ushort selector;
uchar reservedIst; uchar ist;
uchar flags; uchar flags;
ushort baseMid; ushort baseMid;
uint baseHigh; uint baseHigh;
@ -71,7 +71,11 @@ void KeLoadIDT(void);
void KeSetupIDT(void); void KeSetupIDT(void);
void KeSendEOItoPIC(uchar isr); void KeSendEOItoPIC(uchar isr);
void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags); void KeSetIDTGate(uchar rank,
ulong base,
ushort selector,
uchar flags,
uchar ist);
error_t KeRegisterISR(void (*isr)(ISRFrame_t *regs), uchar isrNo); error_t KeRegisterISR(void (*isr)(ISRFrame_t *regs), uchar isrNo);
void KeBrkDumpRegisters(ISRFrame_t *regs); void KeBrkDumpRegisters(ISRFrame_t *regs);

21
include/mm/mm.h
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@ -40,6 +40,8 @@
#define NVS_ZONE 4 // Dunno #define NVS_ZONE 4 // Dunno
#define BADRAM_ZONE 5 // Invalid zone because material problem... #define BADRAM_ZONE 5 // Invalid zone because material problem...
#define MAX_ENTRIES 2048 // Max number of memory map entries #define MAX_ENTRIES 2048 // Max number of memory map entries
#define KPAGESIZE (4 * KB)
#define UPAGESIZE (2 * MB)
//----------------------------------------------------------------------------// //----------------------------------------------------------------------------//
@ -71,15 +73,14 @@ struct GdtEntry_t
struct TssDescriptor_t struct TssDescriptor_t
{ {
ushort lowLimit; ushort lowLimit;
ushort lowBase; ushort lowBase;
uchar middleBase; uchar middleBase;
uchar access; uchar access;
unsigned middleLimit: 4; uchar flags;
unsigned flags: 4; uchar highBase;
uchar highBase; uint veryHighBase;
uint veryHighBase; uint reserved;
uint reserved;
} __attribute__ ((packed)); } __attribute__ ((packed));
struct Tss_t struct Tss_t
@ -149,7 +150,7 @@ void MmInitGdt(void);
// //
// Loads the descriptor table // Loads the descriptor table
// //
extern void MmLoadGdt(); extern void MmLoadGdt(GdtPtr_t *gdtPtr, ushort tssOffset);
// //

2
kaleid/kernel/init/init.c
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@ -54,7 +54,6 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
BtDoSanityChecks(mbMagic); BtDoSanityChecks(mbMagic);
// Memory // Memory
//MmInitGdt();
MmInitMemoryMap(); MmInitMemoryMap();
MmInitPaging(); MmInitPaging();
MmInitHeap(); MmInitHeap();
@ -62,6 +61,7 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
// Interrupts launching // Interrupts launching
KeSetupIDT(); KeSetupIDT();
KeEnableIRQs(); KeEnableIRQs();
MmInitGdt();
// Start drivers // Start drivers
KeEnableRTC(); KeEnableRTC();

141
kaleid/kernel/ke/idt.c
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@ -31,6 +31,8 @@ IdtEntry_t idt[256] = { 0 };
IdtPtr_t _KeIdtPtr; IdtPtr_t _KeIdtPtr;
bool KeIdtIsInitialized = 0; bool KeIdtIsInitialized = 0;
extern ulong *MmStackGuards[2];
static ISRList_t isrList = { 0 }; static ISRList_t isrList = { 0 };
static char *ExceptionsChar[32] = { static char *ExceptionsChar[32] = {
@ -70,6 +72,10 @@ static char *ExceptionsChar[32] = {
static void EnablePIC(void); static void EnablePIC(void);
static void EarlyExceptionHandler(ISRFrame_t *regs); static void EarlyExceptionHandler(ISRFrame_t *regs);
static void DoubleFaultHandler(ISRFrame_t *regs);
//paging.c
ulong *MmGetStackGuards(void);
// //
// Registers an isr with his IRQ to handle driver interrupts // Registers an isr with his IRQ to handle driver interrupts
@ -117,56 +123,56 @@ void KeSetupIDT(void)
_KeIdtPtr.base = &idt; _KeIdtPtr.base = &idt;
// Set IDT Exception Gates // Set IDT Exception Gates
KeSetIDTGate(0x00, (ulong)isr0, codeSeg, 0x8E); KeSetIDTGate(0x00, (ulong)isr0, codeSeg, 0x8E, 0);
KeSetIDTGate(0x01, (ulong)isr1, codeSeg, 0x8E); KeSetIDTGate(0x01, (ulong)isr1, codeSeg, 0x8E, 0);
KeSetIDTGate(0x02, (ulong)isr2, codeSeg, 0x8E); KeSetIDTGate(0x02, (ulong)isr2, codeSeg, 0x8E, 0);
KeSetIDTGate(0x03, (ulong)isr3, codeSeg, 0x8E); KeSetIDTGate(0x03, (ulong)isr3, codeSeg, 0x8E, 0);
KeSetIDTGate(0x04, (ulong)isr4, codeSeg, 0x8E); KeSetIDTGate(0x04, (ulong)isr4, codeSeg, 0x8E, 0);
KeSetIDTGate(0x05, (ulong)isr5, codeSeg, 0x8E); KeSetIDTGate(0x05, (ulong)isr5, codeSeg, 0x8E, 0);
KeSetIDTGate(0x06, (ulong)isr6, codeSeg, 0x8E); KeSetIDTGate(0x06, (ulong)isr6, codeSeg, 0x8E, 0);
KeSetIDTGate(0x07, (ulong)isr7, codeSeg, 0x8E); KeSetIDTGate(0x07, (ulong)isr7, codeSeg, 0x8E, 0);
KeSetIDTGate(0x08, (ulong)isr8, codeSeg, 0x8E); KeSetIDTGate(0x08, (ulong)isr8, codeSeg, 0x8E, 1);
KeSetIDTGate(0x09, (ulong)isr9, codeSeg, 0x8E); KeSetIDTGate(0x09, (ulong)isr9, codeSeg, 0x8E, 0);
KeSetIDTGate(0x0A, (ulong)isr10, codeSeg, 0x8E); KeSetIDTGate(0x0A, (ulong)isr10, codeSeg, 0x8E, 0);
KeSetIDTGate(0x0B, (ulong)isr11, codeSeg, 0x8E); KeSetIDTGate(0x0B, (ulong)isr11, codeSeg, 0x8E, 0);
KeSetIDTGate(0x0C, (ulong)isr12, codeSeg, 0x8E); KeSetIDTGate(0x0C, (ulong)isr12, codeSeg, 0x8E, 1);
KeSetIDTGate(0x0D, (ulong)isr13, codeSeg, 0x8E); KeSetIDTGate(0x0D, (ulong)isr13, codeSeg, 0x8E, 0);
KeSetIDTGate(0x0E, (ulong)isr14, codeSeg, 0x8E); KeSetIDTGate(0x0E, (ulong)isr14, codeSeg, 0x8E, 0);
KeSetIDTGate(0x0F, (ulong)isr15, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x0F, (ulong)isr15, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x10, (ulong)isr16, codeSeg, 0x8E); KeSetIDTGate(0x10, (ulong)isr16, codeSeg, 0x8E, 0);
KeSetIDTGate(0x11, (ulong)isr17, codeSeg, 0x8E); KeSetIDTGate(0x11, (ulong)isr17, codeSeg, 0x8E, 0);
KeSetIDTGate(0x12, (ulong)isr18, codeSeg, 0x8E); KeSetIDTGate(0x12, (ulong)isr18, codeSeg, 0x8E, 0);
KeSetIDTGate(0x13, (ulong)isr19, codeSeg, 0x8E); KeSetIDTGate(0x13, (ulong)isr19, codeSeg, 0x8E, 0);
KeSetIDTGate(0x14, (ulong)isr20, codeSeg, 0x8E); KeSetIDTGate(0x14, (ulong)isr20, codeSeg, 0x8E, 0);
KeSetIDTGate(0x15, (ulong)isr21, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x15, (ulong)isr21, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x16, (ulong)isr22, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x16, (ulong)isr22, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x17, (ulong)isr23, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x17, (ulong)isr23, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x18, (ulong)isr24, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x18, (ulong)isr24, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x19, (ulong)isr25, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x19, (ulong)isr25, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x1A, (ulong)isr26, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x1A, (ulong)isr26, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x1B, (ulong)isr27, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x1B, (ulong)isr27, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x1C, (ulong)isr28, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x1C, (ulong)isr28, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x1D, (ulong)isr29, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x1D, (ulong)isr29, codeSeg, 0x8E, 0); // INTEL RESERVED
KeSetIDTGate(0x1E, (ulong)isr30, codeSeg, 0x8E); KeSetIDTGate(0x1E, (ulong)isr30, codeSeg, 0x8E, 0);
KeSetIDTGate(0x1F, (ulong)isr31, codeSeg, 0x8E); // INTEL RESERVED KeSetIDTGate(0x1F, (ulong)isr31, codeSeg, 0x8E, 0); // INTEL RESERVED
// Set IDT IRQs Gates // Set IDT IRQs Gates
KeSetIDTGate(0x20, (ulong)isr32, codeSeg, 0x8E); KeSetIDTGate(0x20, (ulong)isr32, codeSeg, 0x8E, 0);
KeSetIDTGate(0x21, (ulong)isr33, codeSeg, 0x8E); KeSetIDTGate(0x21, (ulong)isr33, codeSeg, 0x8E, 0);
KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E); KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E, 0);
KeSetIDTGate(0x23, (ulong)isr35, codeSeg, 0x8E); KeSetIDTGate(0x23, (ulong)isr35, codeSeg, 0x8E, 0);
KeSetIDTGate(0x24, (ulong)isr36, codeSeg, 0x8E); KeSetIDTGate(0x24, (ulong)isr36, codeSeg, 0x8E, 0);
KeSetIDTGate(0x25, (ulong)isr37, codeSeg, 0x8E); KeSetIDTGate(0x25, (ulong)isr37, codeSeg, 0x8E, 0);
KeSetIDTGate(0x26, (ulong)isr38, codeSeg, 0x8E); KeSetIDTGate(0x26, (ulong)isr38, codeSeg, 0x8E, 0);
KeSetIDTGate(0x27, (ulong)isr39, codeSeg, 0x8E); KeSetIDTGate(0x27, (ulong)isr39, codeSeg, 0x8E, 0);
KeSetIDTGate(0x28, (ulong)isr40, codeSeg, 0x8E); KeSetIDTGate(0x28, (ulong)isr40, codeSeg, 0x8E, 0);
KeSetIDTGate(0x29, (ulong)isr41, codeSeg, 0x8E); KeSetIDTGate(0x29, (ulong)isr41, codeSeg, 0x8E, 0);
KeSetIDTGate(0x2A, (ulong)isr42, codeSeg, 0x8E); KeSetIDTGate(0x2A, (ulong)isr42, codeSeg, 0x8E, 0);
KeSetIDTGate(0x2B, (ulong)isr43, codeSeg, 0x8E); KeSetIDTGate(0x2B, (ulong)isr43, codeSeg, 0x8E, 0);
KeSetIDTGate(0x2C, (ulong)isr44, codeSeg, 0x8E); KeSetIDTGate(0x2C, (ulong)isr44, codeSeg, 0x8E, 0);
KeSetIDTGate(0x2D, (ulong)isr45, codeSeg, 0x8E); KeSetIDTGate(0x2D, (ulong)isr45, codeSeg, 0x8E, 0);
KeSetIDTGate(0x2E, (ulong)isr46, codeSeg, 0x8E); KeSetIDTGate(0x2E, (ulong)isr46, codeSeg, 0x8E, 0);
KeSetIDTGate(0x2F, (ulong)isr47, codeSeg, 0x8E); KeSetIDTGate(0x2F, (ulong)isr47, codeSeg, 0x8E, 0);
KeIdtIsInitialized++; KeIdtIsInitialized++;
@ -176,6 +182,7 @@ void KeSetupIDT(void)
} }
KeRegisterISR(KeBrkDumpRegisters, 0x3); KeRegisterISR(KeBrkDumpRegisters, 0x3);
KeRegisterISR(DoubleFaultHandler, 0x8);
// Load IDT // Load IDT
KeLoadIDT(); KeLoadIDT();
@ -185,7 +192,7 @@ void KeSetupIDT(void)
// //
// Set an interrupt gate // Set an interrupt gate
// //
void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags) void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags, uchar ist)
{ {
// Set Base Address // Set Base Address
idt[rank].baseLow = base & 0xFFFF; idt[rank].baseLow = base & 0xFFFF;
@ -197,7 +204,7 @@ void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags)
idt[rank].flags = flags; idt[rank].flags = flags;
// Set Reserved Areas to Zero // Set Reserved Areas to Zero
idt[rank].reservedIst = 0; idt[rank].ist = ist;
idt[rank].reserved = 0; idt[rank].reserved = 0;
} }
@ -296,6 +303,40 @@ static void EarlyExceptionHandler(ISRFrame_t *regs)
KeHaltCPU(); KeHaltCPU();
} }
static void DoubleFaultHandler(ISRFrame_t *regs)
{
bprintf(BStdOut, "test : %p\n", (ulong)(MmGetStackGuards())[0] + 4*KB);
if (regs->rsp <= (ulong)(MmGetStackGuards())[0] + 4*KB) {
bprintf(BStdOut,
"\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Stack Overflow%s\n\n"
" Error code : 0x%x (%b)",
VGA_COLOR_LIGHT_RED,
regs->intNo,
ExceptionsChar[regs->intNo],
regs->ErrorCode,
regs->ErrorCode
);
} else {
bprintf(BStdOut,
"\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Double Fault Abort\n\n"
" Error code : 0x%x (%b)",
VGA_COLOR_LIGHT_RED,
regs->ErrorCode,
regs->ErrorCode
);
}
KeBrkDumpRegisters(regs);
BStdOut->flusher(BStdOut);
KeHaltCPU();
}
void KeBrkDumpRegisters(ISRFrame_t *regs) void KeBrkDumpRegisters(ISRFrame_t *regs)
{ {
bprintf(BStdOut, "\n\n" bprintf(BStdOut, "\n\n"

8
kaleid/kernel/mm/gdt.asm
View File

@ -24,8 +24,6 @@
[BITS 64] [BITS 64]
extern gdtPtr
global MmLoadGdt global MmLoadGdt
global MmStoreGdt global MmStoreGdt
@ -34,7 +32,9 @@ global MmStoreGdt
;; ;;
MmLoadGdt: MmLoadGdt:
;; Loading the gdt via the gdtPtr pointer ;; Loading the gdt via the gdtPtr pointer
lgdt [gdtPtr] lgdt [rdi]
mov ax, si
ltr ax
;; We must far jump because we changed the GDT ;; We must far jump because we changed the GDT
lea rax, [.next] lea rax, [.next]
@ -49,5 +49,5 @@ MmLoadGdt:
;; ;;
MmStoreGdt: MmStoreGdt:
;; Loading the gdt via the gdtPtr pointer ;; Loading the gdt via the gdtPtr pointer
sgdt [gdtPtr] sgdt [rdi]
ret ret

126
kaleid/kernel/mm/gdt.c
View File

@ -23,89 +23,67 @@
//----------------------------------------------------------------------------// //----------------------------------------------------------------------------//
#include <mm/mm.h> #include <mm/mm.h>
#include <init/boot.h>
//Tss_t tssEntry = { 0 };
GdtPtr_t gdtPtr; GdtPtr_t gdtPtr;
GdtEntry_t gdt[4] __attribute__((__aligned__(KPAGESIZE)));
/* static void SetGdtEntry(int index, uint base, uint limit, uchar access) */ TssDescriptor_t tssDesc __attribute__((__aligned__(KPAGESIZE)));
/* { */ Tss_t tss __attribute__((__aligned__(KPAGESIZE)));
/* gdtEntries[index].lowBase = (base & 0xFFFF); */
/* gdtEntries[index].middleBase = (base >> 16) & 0xFF; */
/* gdtEntries[index].highBase = (base >> 24) & 0xFF; */
/* gdtEntries[index].lowLimit = (limit & 0xFFFF); */
/* gdtEntries[index].granularity = (limit >> 16) & 0x0F; */
/* gdtEntries[index].granularity |= 0xA0; */
/* // 0x10 is system */
/* // 0x80 is present */
/* gdtEntries[index].access = access | 0x10 | 0x80; */
/* } */
/* static void SetTssEntry(uchar index, ulong base, ulong limit) */
/* { */
/* TssDescriptor_t tssDesc = { 0 }; */
/* tssDesc.limitLow = limit & 0xffff; */
/* tssDesc.size = (limit >> 16) & 0xf; */
/* tssDesc.base00 = base & 0xffff; */
/* tssDesc.base16 = (base >> 16) & 0xff; */
/* tssDesc.base24 = (base >> 24) & 0xff; */
/* tssDesc.base32 = (base >> 32) & 0xffffffff; */
/* tssDesc.reserved = 0; */
/* tssDesc.access = 0x01 | 0x08 | 0x10 | 0x80; */
/* memmove(&gdtEntries[index], &tssDesc, sizeof(TssDescriptor_t)); */
/* } */
void MmInitGdt(void) void MmInitGdt(void)
{ {
MmStoreGdt(); ushort tssOffset = (ushort)((ulong)(&gdt[2]) - (ulong)(&gdt[0]));
GdtEntry_t *gdt = (GdtEntry_t *)(gdtPtr.base); gdtPtr.base = (ulong)&gdt[0];
extern ulong GDT64; gdtPtr.limit = sizeof(gdt) - 1;
DebugLog("GDT ADDR: %p\n", memzero((void *)&gdt[0], sizeof(gdt));
gdt memzero((void *)&tssDesc, sizeof(tssDesc));
); memzero((void *)&tss, sizeof(tss));
gdt++; gdt[1].lowLimit = 0xFFFF;
gdt[1].access = 0x98;
gdt[1].flags = 0x20;
DebugLog("GDT : \n" tssDesc.access = 0x89;
"lowLimit : %#016hx\n" tssDesc.flags = 0x40;
"lowBase : %#016hx\n" tssDesc.lowBase = (ulong)&tss & 0xFFFF;
"middleBase: %#016hx\n" tssDesc.middleBase = ((ulong)&tss >> 16) & 0xFF;
"access : %#016hx\n" tssDesc.highBase = ((ulong)&tss >> 24) & 0xFF;
"flags : %#016hx\n" tssDesc.veryHighBase = ((ulong)&tss >> 32) & 0xFFFFFFFF;
"highBase : %#016hx\n", tssDesc.lowLimit = sizeof(tss);
gdt->lowLimit,
gdt->lowBase,
gdt->middleBase,
gdt->access,
gdt->flags,
gdt->highBase
);
/* DebugLog("GDT : \n" */ tss.ist1 = 0x0007FFFF; // RESCUE STACK, GARANTIED FREE FOR USE BY OSDEV.ORG
/* "lowLimit : %#016hx\n" */ tss.iomap_base = sizeof(tss);
/* "lowBase : %#016hx\n" */
/* "middleBase: %#016hx\n" */
/* "access : %#016hx\n" */
/* "flags : %#016hx\n" */
/* "highBase : %#016hx\n", */
/* gdt->lowLimit, */
/* gdt->lowBase, */
/* gdt->middleBase, */
/* gdt->access, */
/* gdt->flags, */
/* gdt->highBase */
/* ); */
MmLoadGdt(); memmove(&gdt[2], &tssDesc, sizeof(TssDescriptor_t));
/* DebugLog("TSS\n" */
/* "gdt[0] %#x\n" */
/* "gdt[2] %#x\n" */
/* "access : %#x\n" */
/* "flags : %#x\n" */
/* "lowBase : %#x\n" */
/* "middleBase : %#x\n" */
/* "highBase : %#x\n" */
/* "veryHighBase: %#x\n" */
/* "lowLimit : %#x\n" */
/* "ist : %#x\n" */
/* "iomap_base : %#x\n" */
/* "offset : %#x\n", */
/* &gdt[0], */
/* &gdt[2], */
/* tssDesc.access, */
/* tssDesc.flags, */
/* tssDesc.lowBase, */
/* tssDesc.middleBase, */
/* tssDesc.highBase, */
/* tssDesc.veryHighBase, */
/* tssDesc.lowLimit, */
/* tss.ist1, */
/* tss.iomap_base, */
/* tssOffset */
/* ); */
MmLoadGdt(&gdtPtr, tssOffset);
} }

13
kaleid/kernel/mm/paging.c
View File

@ -7,10 +7,6 @@
#include <io/vga.h> #include <io/vga.h>
#define KPAGESIZE (4 * KB)
#define UPAGESIZE (2 * MB)
// Page directory pointer offset // Page directory pointer offset
typedef ulong pdpe_t; typedef ulong pdpe_t;
@ -52,7 +48,7 @@ volatile pde_t MmPD[512 * RAM_MAX] __attribute__((__aligned__(KPAGESIZE)));;
volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(KPAGESIZE)));; volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(KPAGESIZE)));;
volatile ulong MmStackGuards[2] = { 0 }; ulong MmStackGuards[2] = { 0 };
// //
// Creates our new page table structure and loads it // Creates our new page table structure and loads it
@ -112,6 +108,7 @@ void MmInitPaging(void)
MmLoadPML4((void *)MmPML4); MmLoadPML4((void *)MmPML4);
DebugLog("\tPaging tables initialized at %p, %p\n", &MmPD, &MmPT); DebugLog("\tPaging tables initialized at %p, %p\n", &MmPD, &MmPT);
DebugLog("\tStack Guards at %p, %p\n", MmStackGuards[0], MmStackGuards[1]);
} }
// //
@ -160,6 +157,7 @@ void MmReloadPaging(void)
} }
DebugLog("Paging tables reloaded at %p, %p\n", &MmPD, &MmPT); DebugLog("Paging tables reloaded at %p, %p\n", &MmPD, &MmPT);
DebugLog("Stack Guards at %p, %p\n", MmStackGuards[0], MmStackGuards[1]);
} }
// //
@ -188,3 +186,8 @@ void MmActivatePageHandler(void)
{ {
KeRegisterISR(PagingHandler, 0xe); KeRegisterISR(PagingHandler, 0xe);
} }
ulong *MmGetStackGuards(void)
{
return &MmStackGuards[0];
}