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mainboard: Add ASRock H81M-HDS Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-30 15:02:11 +01:00
# ASRock H81M-HDS
This page describes how to run coreboot on the [ASRock H81M-HDS].
## Required proprietary blobs
Documentation/nb/intel: Add Haswell documentation At the moment, this just gives some details on the MRC. Change-Id: I84e8ca2543b2e19b84a24f7d7032a4aedb6e9272 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30356 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-12-21 11:47:03 +01:00
```eval_rst
Please see :doc:`../../northbridge/intel/haswell/mrc.bin`.
mainboard: Add ASRock H81M-HDS Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-30 15:02:11 +01:00
```
## Building coreboot
A fully working image should be possible just by setting your MAC
address and obtaining the Haswell mrc. You can set the basic config
with the following commands. However, it is strongly advised to use
`make menuconfig` afterwards (or instead), so that you can see all of
the settings.
```bash
make distclean # Note: this will remove your current config, if it exists.
touch .config
./util/scripts/config --enable VENDOR_ASROCK
./util/scripts/config --enable BOARD_ASROCK_H81M_HDS
./util/scripts/config --enable HAVE_MRC
./util/scripts/config --set-str REALTEK_8168_MACADDRESS "xx:xx:xx:xx:xx:xx" # Fill this in!
make olddefconfig
```
If you don't plan on using coreboot's serial console to collect logs,
you might want to disable it at this point (`./util/scripts/config
--disable CONSOLE_SERIAL`). It should reduce the boot time by several
seconds. However, a more flexible method is to change the console log
level from within an OS using `util/nvramtool`, or with the `nvramcui`
payload.
Now, run `make` to build the coreboot image.
## Flashing coreboot
### Internal programming
The main SPI flash can be accessed using [flashrom]. By default, only
the BIOS region of the flash is writable. If you wish to change any
other region, such as the Management Engine or firmware descriptor, then
an external programmer is required (unless you find a clever way around
the flash protection).
The following command may be used to flash coreboot:
```bash
sudo flashrom -p internal --ifd -i bios --noverify-all -w coreboot.rom
```
The use of `--noverify-all` is required since the Management Engine
region is not readable even by the host.
### External programming
The flash chip is a 4 MiB socketed DIP-8 chip. Specifically, it's a
Winbond W25Q32FV, whose datasheet can be found [here][W25Q32FV].
The chip is located to the bottom right-hand side of the board. For
a precise location, refer to section 1.4 (Motherboard Layout) of the
[board manual], where the chip is labelled "32Mb BIOS". Take note of
the chip's orientation, remove it from its socket, and flash it with
an external programmer. For reference, the notch in the chip should be
facing towards the bottom of the board.
## Known issues
- The VGA port doesn't work until the OS reinitialises the display.
- There is no automatic, OS-independent fan control. This is because
src: Capitalize Super I/O Change-Id: I9ad9294dd2ae3e4a8a9069ac6464ad753af65ea5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-09-23 13:15:41 +02:00
the Super I/O hardware monitor can only obtain valid CPU temperature
mainboard: Add ASRock H81M-HDS Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-30 15:02:11 +01:00
readings from the PECI agent, but the required driver doesn't exist
in coreboot. The `coretemp` driver can still be used for accurate CPU
temperature readings from an OS.
Doc/nb/intel/haswell: Add a list of known issues Change-Id: If0339831550f6c70e8056f78633e9a402f35a793 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30455 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-26 11:46:27 +01:00
```eval_rst
Please also see :doc:`../../northbridge/intel/haswell/known-issues`.
```
mainboard: Add ASRock H81M-HDS Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-30 15:02:11 +01:00
## Untested
- parallel port
- PS/2 keyboard
- EHCI debug
- TPM
- infrared module
- chassis intrusion header
- chassis speaker header
## Working
- USB
- S3 suspend/resume
- Gigabit Ethernet
- integrated graphics
Doc/mb/asrock/h81m-hds: Remove PCIe issue that has been fixed PCIe graphics for display output still doesn't work, but that is now listed in the Haswell-specific documentation. Change-Id: I28c50db353b2b965eb847b379d9e1944cb720c77 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-12-17 10:10:36 +01:00
- PCIe
mainboard: Add ASRock H81M-HDS Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-30 15:02:11 +01:00
- SATA
- PS/2 mouse
- serial port
- hardware monitor (see [Known issues](#known-issues))
- onboard audio
- front panel audio
- initialisation with Haswell mrc version 1.6.1 build 2
- graphics init with libgfxinit (see [Known issues](#known-issues))
- flashrom under the vendor firmware
- flashrom under coreboot
- Wake-on-LAN
- Using `me_cleaner`
## Technology
```eval_rst
+------------------+--------------------------------------------------+
Doc/mb/asrock/h81m-hds: Link to the Haswell documentation Change-Id: I50da6da6c1321f8d9d94b11d19187a8c22709705 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30690 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-06 10:11:37 +01:00
| Northbridge | :doc:`../../northbridge/intel/haswell/index` |
mainboard: Add ASRock H81M-HDS Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-30 15:02:11 +01:00
+------------------+--------------------------------------------------+
| Southbridge | Intel Lynx Point (H81) |
+------------------+--------------------------------------------------+
| CPU | Intel Haswell (LGA1150) |
+------------------+--------------------------------------------------+
| Super I/O | Nuvoton NCT6776 |
+------------------+--------------------------------------------------+
| EC | None |
+------------------+--------------------------------------------------+
| Coprocessor | Intel Management Engine |
+------------------+--------------------------------------------------+
```
[ASRock H81M-HDS]: https://www.asrock.com/mb/Intel/H81M-HDS/
[W25Q32FV]: https://www.winbond.com/resource-files/w25q32fv%20revi%2010202015.pdf
[flashrom]: https://flashrom.org/Flashrom
[Board manual]: http://asrock.pc.cdn.bitgravity.com/Manual/H81M-HDS.pdf