2014-03-19 22:31:23 +01:00
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/*
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* This file is part of the coreboot project.
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*
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2014-05-16 02:14:12 +02:00
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* Copyright 2014 Google Inc.
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2014-03-19 22:31:23 +01:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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2014-05-16 02:14:12 +02:00
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#include <arch/cache.h>
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2014-08-08 00:20:21 +02:00
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#include <boardid.h>
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2014-03-19 22:31:23 +01:00
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#include <boot/coreboot_tables.h>
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2014-08-02 02:36:45 +02:00
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#include <console/console.h>
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#include <delay.h>
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2014-08-08 00:20:21 +02:00
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#include <device/device.h>
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#include <gpiolib.h>
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2014-08-02 02:36:45 +02:00
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#include <string.h>
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2014-05-31 03:01:44 +02:00
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#include <soc/qualcomm/ipq806x/include/clock.h>
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2014-06-24 16:26:03 +02:00
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#include <soc/qualcomm/ipq806x/include/gpio.h>
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2014-05-31 03:01:44 +02:00
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#include <soc/qualcomm/ipq806x/include/usb.h>
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2014-05-16 02:14:12 +02:00
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/* convenient shorthand (in MB) */
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2014-05-31 03:01:44 +02:00
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#define DRAM_START (CONFIG_SYS_SDRAM_BASE / MiB)
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2014-05-16 02:14:12 +02:00
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#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
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#define DRAM_END (DRAM_START + DRAM_SIZE)
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/* DMA memory for drivers */
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2014-05-31 03:01:44 +02:00
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#define DMA_START (CONFIG_DRAM_DMA_START / MiB)
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#define DMA_SIZE (CONFIG_DRAM_DMA_SIZE / MiB)
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2014-06-24 16:26:03 +02:00
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#define USB_ENABLE_GPIO 51
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2014-05-31 03:01:44 +02:00
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static void setup_usb(void)
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{
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2014-07-11 00:24:18 +02:00
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#if !CONFIG_BOARD_VARIANT_AP148
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2014-06-24 16:26:03 +02:00
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gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO,
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GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE);
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2014-07-26 02:34:42 +02:00
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gpio_set_out_value(USB_ENABLE_GPIO, 1);
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2014-07-11 00:24:18 +02:00
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#endif
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2014-05-31 03:01:44 +02:00
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usb_clock_config();
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setup_usb_host1();
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}
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2014-05-16 02:14:12 +02:00
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static void setup_mmu(void)
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{
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dcache_mmu_disable();
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/* Map Device memory. */
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mmu_config_range(0, DRAM_START, DCACHE_OFF);
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/* Disable Page 0 for trapping NULL pointer references. */
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mmu_disable_range(0, 1);
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/* Map DRAM memory */
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mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
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/* Map DMA memory */
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2014-05-31 03:01:44 +02:00
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mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
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2014-05-16 02:14:12 +02:00
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mmu_disable_range(DRAM_END, 4096 - DRAM_END);
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mmu_init();
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dcache_mmu_enable();
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}
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2014-03-19 22:31:23 +01:00
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2014-08-08 00:20:21 +02:00
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#define TPM_RESET_GPIO 22
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static void setup_tpm(void)
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{
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if (board_id() != 0)
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return; /* Only proto0 have TPM reset connected to GPIO22 */
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gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP,
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GPIO_4MA, GPIO_ENABLE);
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/*
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* Generate a reset pulse. The spec calls for 80 us minimum, let's
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* make it twice as long. If the output was driven low originally, the
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* reset pulse will be even longer.
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*/
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gpio_set_out_value(TPM_RESET_GPIO, 0);
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udelay(160);
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gpio_set_out_value(TPM_RESET_GPIO, 1);
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}
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2014-09-08 23:34:09 +02:00
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#define SW_RESET_GPIO 26
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static void deassert_sw_reset(void)
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{
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if (board_id() == 0)
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return;
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2014-09-10 05:41:33 +02:00
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/*
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* only proto0.2 and later care about this. This signal is eventually
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* driving the ehernet switch reset input, which is active low. But
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* since this signal gets inverted along the way, the GPIO needs to be
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* driven low to take the switch out of reset.
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*/
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2014-09-08 23:34:09 +02:00
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gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO,
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GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
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2014-09-10 05:41:33 +02:00
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gpio_set_out_value(SW_RESET_GPIO, 0);
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2014-09-08 23:34:09 +02:00
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}
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2014-03-19 22:31:23 +01:00
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static void mainboard_init(device_t dev)
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{
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2014-05-16 02:14:12 +02:00
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setup_mmu();
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2014-05-31 03:01:44 +02:00
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setup_usb();
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2014-09-08 23:34:09 +02:00
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deassert_sw_reset();
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2014-08-08 00:20:21 +02:00
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setup_tpm();
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2014-03-19 22:31:23 +01:00
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.name = "storm",
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.enable_dev = mainboard_enable,
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};
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2014-05-31 03:01:44 +02:00
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void lb_board(struct lb_header *header)
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{
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struct lb_range *dma;
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dma = (struct lb_range *)lb_new_record(header);
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dma->tag = LB_TAB_DMA;
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dma->size = sizeof(*dma);
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dma->range_start = CONFIG_DRAM_DMA_START;
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dma->range_size = CONFIG_DRAM_DMA_SIZE;
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}
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2014-08-02 02:36:45 +02:00
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static int read_gpio(gpio_t gpio_num)
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{
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gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE,
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GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE);
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udelay(10); /* Should be enough to settle. */
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return gpio_get_in_value(gpio_num);
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}
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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struct lb_gpio *gpio;
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const int GPIO_COUNT = 5;
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gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
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gpios->count = GPIO_COUNT;
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gpio = gpios->gpios;
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fill_lb_gpio(gpio++, 15, ACTIVE_LOW, "developer", read_gpio(15));
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fill_lb_gpio(gpio++, 16, ACTIVE_LOW, "recovery", read_gpio(16));
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fill_lb_gpio(gpio++, 17, ACTIVE_LOW, "write protect", read_gpio(17));
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fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "power", 1);
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fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "lid", 0);
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}
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