2022-07-27 06:18:26 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2009-07-02 20:56:24 +02:00
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#ifndef DEVICE_RESOURCE_H
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#define DEVICE_RESOURCE_H
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2003-04-24 08:25:08 +02:00
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2004-10-14 23:10:23 +02:00
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#include <stdint.h>
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Make the device tree available in the rom stage
We thought about two ways to do this change. The way we decided to try
was to
1. drop all ops from devices in romstage
2. constify all devices in romstage (make them read-only) so we can
compile static.c into romstage
3. the device tree "devices" can be used to read configuration from
the device tree (and nothing else, really)
4. the device tree devices are accessed through struct device * in
romstage only. device_t stays the typedef to int in romstage
5. Use the same static.c file in ramstage and romstage
We declare structs as follows:
ROMSTAGE_CONST struct bus dev_root_links[];
ROMSTAGE_CONST is const in romstage and empty in ramstage; This
forces all of the device tree into the text area.
So a struct looks like this:
static ROMSTAGE_CONST struct device _dev21 = {
#ifndef __PRE_RAM__
.ops = 0,
#endif
.bus = &_dev7_links[0],
.path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1c,3)}}},
.enabled = 0,
.on_mainboard = 1,
.subsystem_vendor = 0x1ae0,
.subsystem_device = 0xc000,
.link_list = NULL,
.sibling = &_dev22,
#ifndef __PRE_RAM__
.chip_ops = &southbridge_intel_bd82x6x_ops,
#endif
.chip_info = &southbridge_intel_bd82x6x_info_10,
.next=&_dev22
};
Change-Id: I722454d8d3c40baf7df989f5a6891f6ba7db5727
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1398
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-08-01 01:47:25 +02:00
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#include <stddef.h>
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2003-04-24 08:25:08 +02:00
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#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
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#define IORESOURCE_IO 0x00000100 /* Resource type */
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#define IORESOURCE_MEM 0x00000200
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#define IORESOURCE_IRQ 0x00000400
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2003-09-02 05:36:25 +02:00
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#define IORESOURCE_DRQ 0x00000800
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2003-04-24 08:25:08 +02:00
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2017-03-08 02:45:12 +01:00
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#define IORESOURCE_TYPE_MASK (IORESOURCE_IO | IORESOURCE_MEM \
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| IORESOURCE_IRQ | IORESOURCE_DRQ)
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2015-03-26 19:04:38 +01:00
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2003-04-24 08:25:08 +02:00
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#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */
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#define IORESOURCE_READONLY 0x00002000
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#define IORESOURCE_CACHEABLE 0x00004000
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#define IORESOURCE_RANGELENGTH 0x00008000
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#define IORESOURCE_SHADOWABLE 0x00010000
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#define IORESOURCE_BUS_HAS_VGA 0x00020000
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2017-03-08 02:45:12 +01:00
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/* This resource filters all of the unclaimed transactions to the bus below. */
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#define IORESOURCE_SUBTRACTIVE 0x00040000
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/* The IO resource has a bus below it. */
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#define IORESOURCE_BRIDGE 0x00080000
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2020-05-16 02:33:52 +02:00
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/* This is a request to allocate resource about 4G boundary. */
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#define IORESOURCE_ABOVE_4G 0x00100000
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2021-04-21 19:40:31 +02:00
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/* The resource needs to be soft reserved in the coreboot table */
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#define IORESOURCE_SOFT_RESERVE 0x00200000
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2017-03-08 02:45:12 +01:00
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/* The resource needs to be reserved in the coreboot table */
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#define IORESOURCE_RESERVE 0x10000000
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/* The IO resource assignment has been stored in the device */
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#define IORESOURCE_STORED 0x20000000
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/* An IO resource that has been assigned a value */
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#define IORESOURCE_ASSIGNED 0x40000000
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/* An IO resource the allocator must not change */
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#define IORESOURCE_FIXED 0x80000000
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2003-04-24 08:25:08 +02:00
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2012-08-27 08:09:23 +02:00
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/* PCI specific resource bits (IORESOURCE_BITS) */
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device: Add support for PCIe Resizable BARs
Section 7.8.6 of the PCIe spec (rev 4) indicates that some devices can
indicates support for "Resizable BARs" via a PCIe extended capability.
When support this capability is indicated by the device, the size of
each BAR is determined in a different way than the normal "moving
bits" method. Instead, a pair of capability and control registers is
allocated in config space for each BAR, which can be used to both
indicate the different sizes the device is capable of supporting for
the BAR (powers-of-2 number of bits from 20 [1 MiB] to 63 [8 EiB]), and
to also inform the device of the size that the allocator actually
reserved for the MMIO range.
This patch adds a Kconfig for a mainboard to select if it knows that it
will have a device that requires this support during PCI enumeration.
If so, there is a corresponding Kconfig to indicate the maximum number
of bits of address space to hand out to devices this way (again, limited
by what devices can support and each individual system may want to
support, but just like above, this number can range from 20 to 63) If
the device can support more bits than this Kconfig, the resource request
is truncated to the number indicated by this Kconfig.
BUG=b:214443809
TEST=compile (device with this capability not available yet),
also verify that no changes are seen in resource allocation for
google/brya0 before and after this change.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I14fcbe0ef09fdc7f6061bcf7439d1160d3bc4abf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61215
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-01-14 00:45:07 +01:00
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#define IORESOURCE_PCI64 (1<<0) /* 64bit long pci resource */
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#define IORESOURCE_PCI_BRIDGE (1<<1) /* A bridge pci resource */
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#define IORESOURCE_PCIE_RESIZABLE_BAR (1<<2) /* A Resizable BAR */
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2003-04-24 08:25:08 +02:00
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2009-07-02 20:56:24 +02:00
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typedef u64 resource_t;
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2003-04-24 08:25:08 +02:00
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struct resource {
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2004-10-14 23:10:23 +02:00
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resource_t base; /* Base address of the resource */
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resource_t size; /* Size of the resource */
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resource_t limit; /* Largest valid value base + size -1 */
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2017-04-17 05:05:36 +02:00
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DEVTREE_CONST struct resource *next; /* Next resource in the list */
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2003-04-24 08:25:08 +02:00
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unsigned long flags; /* Descriptions of the kind of resource */
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unsigned long index; /* Bus specific per device resource id */
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2004-03-19 01:08:48 +01:00
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unsigned char align; /* Required alignment (log 2) of the resource */
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unsigned char gran; /* Granularity (log 2) of the resource */
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2003-04-24 08:25:08 +02:00
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/* Alignment must be >= the granularity of the resource */
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};
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2009-07-02 20:56:24 +02:00
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/* Macros to generate index values for resources */
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2017-03-07 21:55:23 +01:00
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#define IOINDEX_SUBTRACTIVE(IDX, LINK) (0x10000000 + ((IDX) << 8) + LINK)
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2004-10-14 23:10:23 +02:00
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#define IOINDEX_SUBTRACTIVE_LINK(IDX) (IDX & 0xff)
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2017-03-07 21:55:23 +01:00
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#define IOINDEX(IDX, LINK) (((LINK) << 16) + IDX)
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2017-03-07 23:31:19 +01:00
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#define IOINDEX_LINK(IDX) ((IDX & 0xf0000) >> 16)
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2009-07-02 20:56:24 +02:00
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#define IOINDEX_IDX(IDX) (IDX & 0xffff)
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2004-10-14 23:10:23 +02:00
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/* Generic resource helper functions */
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struct device;
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2004-10-30 10:05:41 +02:00
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struct bus;
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2021-06-14 10:29:51 +02:00
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void compact_resources(struct device *dev);
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struct resource *probe_resource(const struct device *dev, unsigned int index);
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struct resource *new_resource(struct device *dev, unsigned int index);
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struct resource *find_resource(const struct device *dev, unsigned int index);
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resource_t resource_end(const struct resource *resource);
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resource_t resource_max(const struct resource *resource);
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void report_resource_stored(struct device *dev, const struct resource *resource,
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const char *comment);
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typedef void (*resource_search_t)(void *gp, struct device *dev, struct resource *res);
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void search_bus_resources(struct bus *bus, unsigned long type_mask, unsigned long type,
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resource_search_t search, void *gp);
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void search_global_resources(unsigned long type_mask, unsigned long type,
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resource_search_t search, void *gp);
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2004-10-30 10:05:41 +02:00
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2005-07-08 04:49:49 +02:00
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#define RESOURCE_TYPE_MAX 20
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2021-06-14 10:29:51 +02:00
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const char *resource_type(const struct resource *resource);
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2005-07-08 04:49:49 +02:00
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2021-06-14 10:29:51 +02:00
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static inline void *res2mmio(const struct resource *res, unsigned long offset,
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2014-12-25 03:43:20 +01:00
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unsigned long mask)
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{
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return (void *)(uintptr_t)((res->base + offset) & ~mask);
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}
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2021-06-13 23:40:22 +02:00
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void log_resource(const char *type, const struct device *dev, const struct resource *res,
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const char *srcfile, const int line);
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#define LOG_RESOURCE(type, dev, res) \
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do { \
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if (CONFIG(DEBUG_RESOURCES) && (dev) && (res)) \
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log_resource(type, (dev), (res), __func__, __LINE__); \
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} while (0)
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2020-05-16 00:43:15 +02:00
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/*
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* Pick largest resource on the bus using the given mask and type.
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* Params:
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* bus = Bus from which the resource needs to picked from.
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* result_res = If NULL, there was no previous resource picked on this bus, else it points to
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* the last picked resource.
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* type_mask = Mask to be applied when searching for resource
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* type = Expected type for the resource
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*
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* Returns:
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* If resource is found, returns the device and sets result_rest to point to the resource. Else
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* returns NULL.
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*/
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const struct device *largest_resource(struct bus *bus, struct resource **result_res,
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unsigned long type_mask, unsigned long type);
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/* Compute and allocate resources. This is the main resource allocator entry point. */
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void allocate_resources(const struct device *root);
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2009-07-02 20:56:24 +02:00
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#endif /* DEVICE_RESOURCE_H */
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