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coreboot-kgpe-d16/src/include/console/console.h

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Add 2 missing license headers based on svn logs and remove an unneeded #include Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 20:49:46 +02:00
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2003 Eric Biederman
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
#ifndef CONSOLE_CONSOLE_H_
#define CONSOLE_CONSOLE_H_
oops. always run abuild on a clean tree with no other patches applied. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-27 22:51:33 +02:00
#include <stdint.h>
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
#include <console/loglevel.h>
Unify use of post_code Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-11 22:17:22 +02:00
#include <console/post_codes.h>
move console includes to central console/console.h Because it's included everywhere anyways. Change-Id: I99a9e6edac08df57c50ef3a706fdbd395cad0abc Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/691 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2011-05-10 19:46:41 +02:00
Fix console prototypes for non-romcc boards. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-02 23:39:12 +02:00
#ifndef __PRE_RAM__
added rx support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-13 04:40:51 +01:00
unsigned char console_rx_byte(void);
int console_tst_byte(void);
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
struct console_driver {
void (*init)(void);
void (*tx_byte)(unsigned char byte);
void (*tx_flush)(void);
added rx support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-13 04:40:51 +01:00
unsigned char (*rx_byte)(void);
int (*tst_byte)(void);
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
};
- First pass through with with device tree enhancement merge. Most of the mechanisms should be in place but don't expect anything to quite work yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 22:54:17 +02:00
#define __console __attribute__((used, __section__ (".rodata.console_drivers")))
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
/* Defined by the linker... */
extern struct console_driver console_drivers[];
extern struct console_driver econsole_drivers[];
- get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files. - start naming all versions of post code output "post_code()" Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-01 11:50:32 +02:00
#endif
mini part of the patch on the mailing list to fix the boards again Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-31 02:06:12 +02:00
This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-31 16:34:40 +02:00
#ifndef __ROMCC__
console: Hide global console_loglevel Change-Id: I7bdc468bc3f74516abb2c583bdb5b6d7555d987c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5333 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-02-28 13:37:27 +01:00
int console_log_level(int msg_level);
remove some more warnings Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-03 00:11:20 +02:00
void console_init(void);
console: Split console_init() Splitting the version prompt satisfies some requirements ROMCC sets for the order in which we include source files. Also GDB stub will need console hardware before entering main(). Change-Id: Ibb445a2f8cfb440d9dd69cade5f0ea41fb606f50 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5331 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-02-14 09:04:31 +01:00
void console_hw_init(void);
Provide MRC with a console printing callback function Let memory initialization code use the coreboot romstage console. This simplifies the code and makes sure that all output is available in /sys/firmware/log. The pei_data structure is modified to allow passing the console output function pointer. Romstage console_tx_byte() is used for this purpose. Change-Id: I722cfcb9ff0cf527c12cb6cac09d77ef17b588e0 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1823 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-06-08 03:47:13 +02:00
void console_tx_byte(unsigned char byte);
x86: expose console_tx_flush in romstage The vboot module relied on being able to flush the console after it called vtxprintf() from its log wrapper function. Expose the console_tx_flush() function in romstage so the vboot module can ensure messages are flushed. Change-Id: I578053df4b88c2068bd9cc90eea5573069a0a4e8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2882 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-23 01:52:42 +01:00
void console_tx_flush(void);
remove some more warnings Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-03 00:11:20 +02:00
void post_code(u8 value);
Extend CMOS POST code logging to store extra data This can be used to indicate sub-state within a POST code range which can assist in debugging BIOS hangs. For example this can be used to indicate which device is about to be initialized so if the system hangs while talking to that device it can be identified. Change-Id: I2f8155155f09fe9e242ebb7204f0b5cba3a1fa1e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58104 Reviewed-on: http://review.coreboot.org/4229 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-10 19:21:41 +02:00
#if CONFIG_CMOS_POST_EXTRA
void post_log_extra(u32 value);
Log device path into CMOS during probe stages One of the most common hangs during coreboot execution is during ramstage device init steps. Currently there are a set of (somewhat misleading) post codes during this phase which give some indication as to where execution stopped, but it provides no information on what device was actually being initialized at that point. This uses the new CMOS "extra" log banks to store the encoded device path of the device that is about to be touched by coreboot. This way if the system hangs when talking to the device there will be some indication where to investigate next. interrupted boot with reset button and gathered the eventlog after several test runs: 26 | 2013-06-10 10:32:48 | System boot | 120 27 | 2013-06-10 10:32:48 | Last post code in previous boot | 0x75 | Device Initialize 28 | 2013-06-10 10:32:48 | Extra info from previous boot | PCI | 00:16.0 29 | 2013-06-10 10:32:48 | Reset Button 30 | 2013-06-10 10:32:48 | System Reset Change-Id: I6045bd4c384358b8a4e464eb03ccad639283939c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58105 Reviewed-on: http://review.coreboot.org/4230 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-10 19:34:20 +02:00
struct device;
void post_log_path(struct device *dev);
void post_log_clear(void);
Extend CMOS POST code logging to store extra data This can be used to indicate sub-state within a POST code range which can assist in debugging BIOS hangs. For example this can be used to indicate which device is about to be initialized so if the system hangs while talking to that device it can be identified. Change-Id: I2f8155155f09fe9e242ebb7204f0b5cba3a1fa1e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58104 Reviewed-on: http://review.coreboot.org/4229 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-10 19:21:41 +02:00
#else
#define post_log_extra(x) do {} while (0)
Log device path into CMOS during probe stages One of the most common hangs during coreboot execution is during ramstage device init steps. Currently there are a set of (somewhat misleading) post codes during this phase which give some indication as to where execution stopped, but it provides no information on what device was actually being initialized at that point. This uses the new CMOS "extra" log banks to store the encoded device path of the device that is about to be touched by coreboot. This way if the system hangs when talking to the device there will be some indication where to investigate next. interrupted boot with reset button and gathered the eventlog after several test runs: 26 | 2013-06-10 10:32:48 | System boot | 120 27 | 2013-06-10 10:32:48 | Last post code in previous boot | 0x75 | Device Initialize 28 | 2013-06-10 10:32:48 | Extra info from previous boot | PCI | 00:16.0 29 | 2013-06-10 10:32:48 | Reset Button 30 | 2013-06-10 10:32:48 | System Reset Change-Id: I6045bd4c384358b8a4e464eb03ccad639283939c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58105 Reviewed-on: http://review.coreboot.org/4230 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-10 19:34:20 +02:00
#define post_log_path(x) do {} while (0)
#define post_log_clear() do {} while (0)
Extend CMOS POST code logging to store extra data This can be used to indicate sub-state within a POST code range which can assist in debugging BIOS hangs. For example this can be used to indicate which device is about to be initialized so if the system hangs while talking to that device it can be identified. Change-Id: I2f8155155f09fe9e242ebb7204f0b5cba3a1fa1e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58104 Reviewed-on: http://review.coreboot.org/4229 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-10 19:21:41 +02:00
#endif
Add a capability for mainboard-specific posting. Some mainboards have really nice capabilities for posting, beyond simple POST cards. Further, some can not use a POST card. This change defines a weak symbol (mainboard_post) that can be overridden by a real mainboard_post function. If, for example, you'd like to do something fancy before the payload starts, you can add this to mainboard.c: void mainboard_post(u8 value) { switch(value){ case POST_TIME_TO_PARTY: some_fancy_lights(); break; } } Maybe the post function should be an entry in the device. We're beginning to over-use weak symbols. BUG=None TEST=Build and boot a google chromebook. Observe that it still works. Use it to drive some pretty lights. Change-Id: I3512d2ec34a66c747287191851c3f68b6a7cc1b2 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/1397 Tested-by: build bot (Jenkins)
2012-08-03 20:20:57 +02:00
/* this function is weak and can be overridden by a mainboard function. */
void mainboard_post(u8 value);
remove some more warnings Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-03 00:11:20 +02:00
void __attribute__ ((noreturn)) die(const char *msg);
Check the printk format string against the matching arguments. We have this type of checking in the v3 code since ages, but v2 will happily compile any code with bogus printk format strings and/or parameters. This can cause real bugs and at least needs to emit a warning, if not an error. Go with a warning for now since most of the flagged format strings are wrong but harmless in a 32-bit x86 environment. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20 19:37:26 +01:00
int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
ARM: Separate the early console (romstage) from the bootblock console. It might be that you want an early console in romstage before RAM is up, but you can't or don't want to support the console all the way back in the bootblock. By making the console in those two different environments configurable seperately that becomes possible. On the 5250 console output as early as the bootblock works, but on the 5420 it only starts working in the ROM stage after clocks have been initialized. Change-Id: I68ae3fcb4d828fa8a328a30001c23c81a4423bb8 Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3671 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-06 09:21:20 +02:00
#if defined(__BOOT_BLOCK__) && !CONFIG_BOOTBLOCK_CONSOLE || \
SMM: Only have console with DEBUG_SMI Existing code compiled serial communication and printk() for SMM even when DEBUG_SMI was not selected. Change-Id: Ic5e25cd7453cb2243f7ac592b093fba752a299f7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5142 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-26 10:32:51 +01:00
defined(__SMM__) && !CONFIG_DEBUG_SMI || \
ARM: Separate the early console (romstage) from the bootblock console. It might be that you want an early console in romstage before RAM is up, but you can't or don't want to support the console all the way back in the bootblock. By making the console in those two different environments configurable seperately that becomes possible. On the 5250 console output as early as the bootblock works, but on the 5420 it only starts working in the ROM stage after clocks have been initialized. Change-Id: I68ae3fcb4d828fa8a328a30001c23c81a4423bb8 Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3671 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-06 09:21:20 +02:00
(defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)) && !CONFIG_EARLY_CONSOLE
console: Only print romstage messages with EARLY_CONSOLE enabled. Revise console source file dependency (especially for EARLY_CONSOLE) and interpret printk/console_init according to EARLY_CONSOLE setting (no-ops if EARLY_CONSOLE is not defined). Verified to boot on x86/qemu and armv7/snow. Disabling EARLY_CONSOLE correctly stops romstage messages on x86/qemu (armv7/snow needs more changes to work). Change-Id: Idbbd3a26bc1135c9d3ae282aad486961fb60e0ea Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2300 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-06 14:51:15 +01:00
static inline void printk(int LEVEL, const char *fmt, ...);
static inline void printk(int LEVEL, const char *fmt, ...) {
/* Do nothing. */
}
#else /* defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE */
fix newly introduced printk_foo warnings.. Interesting enough, console_printk was only used in a single place and duplicated a large part of console.h which is included in the same place. Thus, just drop console_printk.c and we're one down with console complexity Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-23 14:23:40 +01:00
#define printk(LEVEL, fmt, args...) \
do { \
Get rid of MAXIMUM_CONSOLE_LOGLEVEL; compile all messages into the coreboot binary This option has never had much if any use. It solved a problem over 10 years ago that resulted from an argument over the value or lack thereof of including all the debug strings in a coreboot image. The answer is in: it's a good idea to maintain the capability to print all messages, for many reasons. This option is also misleading people, as in a recent discussion, to believe that log messges are controlled at build time in a way they are not. For the record, from this day forward, we can print messages at all log levels and the default log level is set at boot time, as directed by DEFAULT_CONSOLE_LOGLEVEL. You can set the default to 0 at build time and if you are having trouble override it in CMOS and get more messages. Besides, a quick glance shows it's always set to max (9 in this case) in the very few cases (1) in which it is set. Change-Id: I60c4cdaf4dcd318b841a6d6c70546417c5626f21 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/3188 Tested-by: build bot (Jenkins)
2013-05-03 18:25:27 +02:00
do_printk(LEVEL, fmt, ##args); \
fix newly introduced printk_foo warnings.. Interesting enough, console_printk was only used in a single place and duplicated a large part of console.h which is included in the same place. Thus, just drop console_printk.c and we're one down with console complexity Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-23 14:23:40 +01:00
} while(0)
console: Only print romstage messages with EARLY_CONSOLE enabled. Revise console source file dependency (especially for EARLY_CONSOLE) and interpret printk/console_init according to EARLY_CONSOLE setting (no-ops if EARLY_CONSOLE is not defined). Verified to boot on x86/qemu and armv7/snow. Disabling EARLY_CONSOLE correctly stops romstage messages on x86/qemu (armv7/snow needs more changes to work). Change-Id: Idbbd3a26bc1135c9d3ae282aad486961fb60e0ea Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2300 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-06 14:51:15 +01:00
#endif /* defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE */
This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-31 16:34:40 +02:00
#define print_emerg(STR) printk(BIOS_EMERG, "%s", (STR))
#define print_alert(STR) printk(BIOS_ALERT, "%s", (STR))
#define print_crit(STR) printk(BIOS_CRIT, "%s", (STR))
#define print_err(STR) printk(BIOS_ERR, "%s", (STR))
#define print_warning(STR) printk(BIOS_WARNING,"%s", (STR))
#define print_notice(STR) printk(BIOS_NOTICE, "%s", (STR))
#define print_info(STR) printk(BIOS_INFO, "%s", (STR))
#define print_debug(STR) printk(BIOS_DEBUG, "%s", (STR))
#define print_spew(STR) printk(BIOS_SPEW, "%s", (STR))
#define print_emerg_char(CH) printk(BIOS_EMERG, "%c", (CH))
#define print_alert_char(CH) printk(BIOS_ALERT, "%c", (CH))
#define print_crit_char(CH) printk(BIOS_CRIT, "%c", (CH))
#define print_err_char(CH) printk(BIOS_ERR, "%c", (CH))
#define print_warning_char(CH) printk(BIOS_WARNING,"%c", (CH))
#define print_notice_char(CH) printk(BIOS_NOTICE, "%c", (CH))
#define print_info_char(CH) printk(BIOS_INFO, "%c", (CH))
#define print_debug_char(CH) printk(BIOS_DEBUG, "%c", (CH))
#define print_spew_char(CH) printk(BIOS_SPEW, "%c", (CH))
#define print_emerg_hex8(HEX) printk(BIOS_EMERG, "%02x", (HEX))
#define print_alert_hex8(HEX) printk(BIOS_ALERT, "%02x", (HEX))
#define print_crit_hex8(HEX) printk(BIOS_CRIT, "%02x", (HEX))
#define print_err_hex8(HEX) printk(BIOS_ERR, "%02x", (HEX))
#define print_warning_hex8(HEX) printk(BIOS_WARNING,"%02x", (HEX))
#define print_notice_hex8(HEX) printk(BIOS_NOTICE, "%02x", (HEX))
#define print_info_hex8(HEX) printk(BIOS_INFO, "%02x", (HEX))
#define print_debug_hex8(HEX) printk(BIOS_DEBUG, "%02x", (HEX))
#define print_spew_hex8(HEX) printk(BIOS_SPEW, "%02x", (HEX))
fix newly introduced printk_foo warnings.. Interesting enough, console_printk was only used in a single place and duplicated a large part of console.h which is included in the same place. Thus, just drop console_printk.c and we're one down with console complexity Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-23 14:23:40 +01:00
#define print_emerg_hex16(HEX) printk(BIOS_EMERG, "%04x", (HEX))
#define print_alert_hex16(HEX) printk(BIOS_ALERT, "%04x", (HEX))
#define print_crit_hex16(HEX) printk(BIOS_CRIT, "%04x", (HEX))
#define print_err_hex16(HEX) printk(BIOS_ERR, "%04x", (HEX))
#define print_warning_hex16(HEX) printk(BIOS_WARNING,"%04x", (HEX))
#define print_notice_hex16(HEX) printk(BIOS_NOTICE, "%04x", (HEX))
#define print_info_hex16(HEX) printk(BIOS_INFO, "%04x", (HEX))
#define print_debug_hex16(HEX) printk(BIOS_DEBUG, "%04x", (HEX))
#define print_spew_hex16(HEX) printk(BIOS_SPEW, "%04x", (HEX))
#define print_emerg_hex32(HEX) printk(BIOS_EMERG, "%08x", (HEX))
#define print_alert_hex32(HEX) printk(BIOS_ALERT, "%08x", (HEX))
#define print_crit_hex32(HEX) printk(BIOS_CRIT, "%08x", (HEX))
#define print_err_hex32(HEX) printk(BIOS_ERR, "%08x", (HEX))
#define print_warning_hex32(HEX) printk(BIOS_WARNING,"%08x", (HEX))
#define print_notice_hex32(HEX) printk(BIOS_NOTICE, "%08x", (HEX))
#define print_info_hex32(HEX) printk(BIOS_INFO, "%08x", (HEX))
#define print_debug_hex32(HEX) printk(BIOS_DEBUG, "%08x", (HEX))
#define print_spew_hex32(HEX) printk(BIOS_SPEW, "%08x", (HEX))
This patch gets usbdebug console working in romstage. - actually hook up usbdebug in printk/print_ for romstage - make usbdebug.c more similar to the Linux kernel version it was originally derived from. - increase retries and timing for usbdebug init (at least one chipset seems to need this) - src/pc80/usbdebug_serial.c is not needed - some small console cleanups Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Patrick Georgi <patrick.georgi@secunet.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-28 09:05:54 +01:00
This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-31 16:34:40 +02:00
#else
- get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files. - start naming all versions of post code output "post_code()" Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-01 11:50:32 +02:00
fix the tree again. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 02:51:34 +01:00
/* __ROMCC__ */
This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-31 16:34:40 +02:00
#define print_emerg(STR) __console_tx_string(BIOS_EMERG, STR)
#define print_alert(STR) __console_tx_string(BIOS_ALERT, STR)
#define print_crit(STR) __console_tx_string(BIOS_CRIT, STR)
#define print_err(STR) __console_tx_string(BIOS_ERR, STR)
#define print_warning(STR) __console_tx_string(BIOS_WARNING, STR)
#define print_notice(STR) __console_tx_string(BIOS_NOTICE, STR)
#define print_info(STR) __console_tx_string(BIOS_INFO, STR)
#define print_debug(STR) __console_tx_string(BIOS_DEBUG, STR)
#define print_spew(STR) __console_tx_string(BIOS_SPEW, STR)
#define print_emerg_char(CH) __console_tx_char(BIOS_EMERG, CH)
#define print_alert_char(CH) __console_tx_char(BIOS_ALERT, CH)
#define print_crit_char(CH) __console_tx_char(BIOS_CRIT, CH)
#define print_err_char(CH) __console_tx_char(BIOS_ERR, CH)
#define print_warning_char(CH) __console_tx_char(BIOS_WARNING, CH)
#define print_notice_char(CH) __console_tx_char(BIOS_NOTICE, CH)
#define print_info_char(CH) __console_tx_char(BIOS_INFO, CH)
#define print_debug_char(CH) __console_tx_char(BIOS_DEBUG, CH)
#define print_spew_char(CH) __console_tx_char(BIOS_SPEW, CH)
#define print_emerg_hex8(HEX) __console_tx_hex8(BIOS_EMERG, HEX)
#define print_alert_hex8(HEX) __console_tx_hex8(BIOS_ALERT, HEX)
#define print_crit_hex8(HEX) __console_tx_hex8(BIOS_CRIT, HEX)
#define print_err_hex8(HEX) __console_tx_hex8(BIOS_ERR, HEX)
#define print_warning_hex8(HEX) __console_tx_hex8(BIOS_WARNING, HEX)
#define print_notice_hex8(HEX) __console_tx_hex8(BIOS_NOTICE, HEX)
#define print_info_hex8(HEX) __console_tx_hex8(BIOS_INFO, HEX)
#define print_debug_hex8(HEX) __console_tx_hex8(BIOS_DEBUG, HEX)
#define print_spew_hex8(HEX) __console_tx_hex8(BIOS_SPEW, HEX)
#define print_emerg_hex16(HEX) __console_tx_hex16(BIOS_EMERG, HEX)
#define print_alert_hex16(HEX) __console_tx_hex16(BIOS_ALERT, HEX)
#define print_crit_hex16(HEX) __console_tx_hex16(BIOS_CRIT, HEX)
#define print_err_hex16(HEX) __console_tx_hex16(BIOS_ERR, HEX)
#define print_warning_hex16(HEX) __console_tx_hex16(BIOS_WARNING, HEX)
#define print_notice_hex16(HEX) __console_tx_hex16(BIOS_NOTICE, HEX)
#define print_info_hex16(HEX) __console_tx_hex16(BIOS_INFO, HEX)
#define print_debug_hex16(HEX) __console_tx_hex16(BIOS_DEBUG, HEX)
#define print_spew_hex16(HEX) __console_tx_hex16(BIOS_SPEW, HEX)
#define print_emerg_hex32(HEX) __console_tx_hex32(BIOS_EMERG, HEX)
#define print_alert_hex32(HEX) __console_tx_hex32(BIOS_ALERT, HEX)
#define print_crit_hex32(HEX) __console_tx_hex32(BIOS_CRIT, HEX)
#define print_err_hex32(HEX) __console_tx_hex32(BIOS_ERR, HEX)
#define print_warning_hex32(HEX) __console_tx_hex32(BIOS_WARNING, HEX)
#define print_notice_hex32(HEX) __console_tx_hex32(BIOS_NOTICE, HEX)
#define print_info_hex32(HEX) __console_tx_hex32(BIOS_INFO, HEX)
#define print_debug_hex32(HEX) __console_tx_hex32(BIOS_DEBUG, HEX)
#define print_spew_hex32(HEX) __console_tx_hex32(BIOS_SPEW, HEX)
Simplify coreboot's console/console.h - shift most (romcc) code out of console.h into arch/x86/lib/romcc_console.c - rename arch/x86/lib/printk_init.c to .../romstage_console.c - drop FUNCTIONS_FOR_PRINT since __console_tx_* are already functions, so there should not be any side effects to eliminating another indirection. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20 23:11:22 +02:00
#include "arch/x86/lib/romcc_console.c"
#endif /* __ROMCC__ */
Drop console/console.c and pc80/serial.c from mainboards' romstage.c. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-08 11:14:51 +02:00
- Initial checkin of the freebios2 tree git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 21:02:15 +02:00
#endif /* CONSOLE_CONSOLE_H_ */