2016-01-12 23:55:28 +01:00
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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2015-06-13 02:30:33 +02:00
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <arch/io.h>
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#include <string.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/lapic.h>
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#include <arch/cpu.h>
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#include <device/path.h>
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#include <device/device.h>
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#include <smp/spinlock.h>
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2015-06-18 10:23:48 +02:00
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#ifndef __x86_64__
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2015-06-13 02:30:33 +02:00
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/* Standard macro to see if a specific flag is changeable */
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static inline int flag_is_changeable_p(uint32_t flag)
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{
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uint32_t f1, f2;
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asm(
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"pushfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"movl %0,%1\n\t"
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"xorl %2,%0\n\t"
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"pushl %0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"popfl\n\t"
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: "=&r" (f1), "=&r" (f2)
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: "ir" (flag));
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return ((f1^f2) & flag) != 0;
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}
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/* Probe for the CPUID instruction */
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int cpu_have_cpuid(void)
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{
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return flag_is_changeable_p(X86_EFLAGS_ID);
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}
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2015-06-18 10:23:48 +02:00
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#else
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int cpu_have_cpuid(void)
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{
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return 1;
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}
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#endif
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2015-06-13 02:30:33 +02:00
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int cpu_cpuid_extended_level(void)
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{
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return cpuid_eax(0x80000000);
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}
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int cpu_phys_address_size(void)
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{
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if (!(cpu_have_cpuid()))
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return 32;
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if (cpu_cpuid_extended_level() >= 0x80000008)
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return cpuid_eax(0x80000008) & 0xff;
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if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
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return 36;
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return 32;
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}
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