2020-09-24 23:33:34 +02:00
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config SOC_EXAMPLE_MIN86
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bool
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help
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This example SoC code along with the example/min86 mainboard
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should serve as a minimal example how a buildable x86 SoC code
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base can look like.
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This can serve, for instance, as a basis to add new SoCs to
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coreboot. Starting with a buildable commit should help with
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the review of the actual code, and also avoid any regressions
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when common coreboot code changes.
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if SOC_EXAMPLE_MIN86
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config SOC_SPECIFIC_OPTIONS
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def_bool y
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2021-06-22 12:58:20 +02:00
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select ARCH_X86
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2020-09-24 23:33:34 +02:00
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select NO_MONOTONIC_TIMER
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2021-10-21 00:43:45 +02:00
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select NO_ECAM_MMCONF_SUPPORT
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2020-09-24 23:33:34 +02:00
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select UNKNOWN_TSC_RATE
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config DCACHE_BSP_STACK_SIZE # required by arch/x86/car.ld
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default 0x100
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endif
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