coreboot-kgpe-d16/src/lib/cbmem.c

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
*/
#include <types.h>
#include <string.h>
#include <bootstate.h>
#include <cbmem.h>
#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <arch/early_variables.h>
#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__)
#include <arch/acpi.h>
#endif
// The CBMEM TOC reserves 512 bytes to keep
// the other entries somewhat aligned.
// Increase if MAX_CBMEM_ENTRIES exceeds 21
#define CBMEM_TOC_RESERVED 512
#define MAX_CBMEM_ENTRIES 16
#define CBMEM_MAGIC 0x434f5245
struct cbmem_entry {
u32 magic;
u32 id;
u64 base;
u64 size;
} __attribute__((packed));
#ifndef __PRE_RAM__
static uint64_t cbmem_base = 0;
static uint64_t cbmem_size = 0;
#endif
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static void cbmem_trace_location(uint64_t base, uint64_t size, const char *s)
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{
if (base && size && s) {
printk(BIOS_DEBUG, "CBMEM region %llx-%llx (%s)\n",
base, base + size - 1, s);
}
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}
static void cbmem_locate_table(uint64_t *base, uint64_t *size)
{
#ifdef __PRE_RAM__
get_cbmem_table(base, size);
#else
if (!(cbmem_base && cbmem_size)) {
get_cbmem_table(&cbmem_base, &cbmem_size);
cbmem_trace_location(cbmem_base, cbmem_size, __FUNCTION__);
}
*base = cbmem_base;
*size = cbmem_size;
#endif
}
struct cbmem_entry *get_cbmem_toc(void)
{
uint64_t base, size;
cbmem_locate_table(&base, &size);
return (struct cbmem_entry *)(unsigned long)base;
}
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#if !defined(__PRE_RAM__)
void cbmem_late_set_table(uint64_t base, uint64_t size)
{
cbmem_trace_location(base, size, __FUNCTION__);
cbmem_base = base;
cbmem_size = size;
}
#endif
/**
* cbmem is a simple mechanism to do some kind of book keeping of the coreboot
* high tables memory. This is a small amount of memory which is "stolen" from
* the system memory for coreboot purposes. Usually this memory is used for
* - the coreboot table
* - legacy tables (PIRQ, MP table)
* - ACPI tables
* - suspend/resume backup memory
*/
#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)
static void cbmem_init(void)
{
uint64_t baseaddr, size;
struct cbmem_entry *cbmem_toc;
cbmem_locate_table(&baseaddr, &size);
cbmem_trace_location(baseaddr, size, __FUNCTION__);
cbmem_toc = (struct cbmem_entry *)(unsigned long)baseaddr;
if (size < (64 * 1024)) {
printk(BIOS_DEBUG, "Increase CBMEM size!\n");
for (;;) ;
}
memset(cbmem_toc, 0, CBMEM_TOC_RESERVED);
cbmem_toc[0] = (struct cbmem_entry) {
.magic = CBMEM_MAGIC,
.id = CBMEM_ID_FREESPACE,
.base = baseaddr + CBMEM_TOC_RESERVED,
.size = size - CBMEM_TOC_RESERVED
};
}
#endif
int cbmem_reinit(void)
{
uint64_t baseaddr, size;
struct cbmem_entry *cbmem_toc;
cbmem_locate_table(&baseaddr, &size);
cbmem_trace_location(baseaddr, size, __FUNCTION__);
cbmem_toc = (struct cbmem_entry *)(unsigned long)baseaddr;
return (cbmem_toc[0].magic == CBMEM_MAGIC);
}
void *cbmem_add(u32 id, u64 size)
{
struct cbmem_entry *cbmem_toc;
int i;
void *p;
/*
* This could be a restart, check if the section is there already. It
* is remotely possible that the dram contents persisted over the
* bootloader upgrade AND the same section now needs more room, but
* this is quite a remote possibility and it is ignored here.
*/
p = cbmem_find(id);
if (p) {
printk(BIOS_NOTICE,
"CBMEM section %x: using existing location at %p.\n",
id, p);
return p;
}
cbmem_toc = get_cbmem_toc();
if (cbmem_toc == NULL) {
return NULL;
}
if (cbmem_toc[0].magic != CBMEM_MAGIC) {
printk(BIOS_ERR, "ERROR: CBMEM was not initialized yet.\n");
return NULL;
}
/* Will the entry fit at all? */
if (size > cbmem_toc[0].size) {
printk(BIOS_ERR, "ERROR: Not enough memory for table %x\n", id);
return NULL;
}
/* Align size to 512 byte blocks */
size = ALIGN(size, 512) < cbmem_toc[0].size ?
ALIGN(size, 512) : cbmem_toc[0].size;
/* Now look for the first free/usable TOC entry */
for (i = 0; i < MAX_CBMEM_ENTRIES; i++) {
if (cbmem_toc[i].id == CBMEM_ID_NONE)
break;
}
if (i >= MAX_CBMEM_ENTRIES) {
printk(BIOS_ERR, "ERROR: No more CBMEM entries available.\n");
return NULL;
}
printk(BIOS_DEBUG, "Adding CBMEM entry as no. %d\n", i);
cbmem_toc[i] = (struct cbmem_entry) {
.magic = CBMEM_MAGIC,
.id = id,
.base = cbmem_toc[0].base,
.size = size
};
cbmem_toc[0].base += size;
cbmem_toc[0].size -= size;
return (void *)(uintptr_t)cbmem_toc[i].base;
}
void *cbmem_find(u32 id)
{
struct cbmem_entry *cbmem_toc;
int i;
cbmem_toc = get_cbmem_toc();
if (cbmem_toc == NULL)
return NULL;
for (i = 0; i < MAX_CBMEM_ENTRIES; i++) {
if (cbmem_toc[i].id == id)
return (void *)(unsigned long)cbmem_toc[i].base;
}
return (void *)NULL;
}
#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)
/* Returns True if it was not initialized before. */
int cbmem_initialize(void)
{
int rv = 0;
/* We expect the romstage to always initialize it. */
if (!cbmem_reinit()) {
#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__)
/* Something went wrong, our high memory area got wiped */
if (acpi_slp_type == 3 || acpi_slp_type == 2)
acpi_slp_type = 0;
#endif
cbmem_init();
rv = 1;
}
#ifndef __PRE_RAM__
cbmem_arch_init();
#endif
/* Migrate cache-as-ram variables. */
car_migrate_variables();
return rv;
}
#endif
#ifndef __PRE_RAM__
static void init_cbmem_post_device(void *unused)
cbmem: dynamic cbmem support This patch adds a parallel implementation of cbmem that supports dynamic sizing. The original implementation relied on reserving a fixed-size block of memory for adding cbmem entries. In order to allow for more flexibility for adding cbmem allocations the dynamic cbmem infrastructure was developed as an alternative to the fixed block approach. Also, the amount of memory to reserve for cbmem allocations does not need to be known prior to the first allocation. The dynamic cbmem code implements the same API as the existing cbmem code except for cbmem_init() and cbmem_reinit(). The add and find routines behave the same way. The dynamic cbmem infrastructure uses a top down allocator that starts allocating from a board/chipset defined function cbmem_top(). A root pointer lives just below cbmem_top(). In turn that pointer points to the root block which contains the entries for all the large alloctations. The corresponding block for each large allocation falls just below the previous entry. It should be noted that this implementation rounds all allocations up to a 4096 byte granularity. Though a packing allocator could be written for small allocations it was deemed OK to just fragment the memory as there shouldn't be that many small allocations. The result is less code with a tradeoff of some wasted memory. +----------------------+ <- cbmem_top() | +----| root pointer | | | +----------------------+ | | | |--------+ | +--->| root block |-----+ | | +----------------------+ | | | | | | | | | | | | | | alloc N |<----+ | | +----------------------+ | | | | | | | | | \|/ | alloc N + 1 |<-------+ v +----------------------+ In addition to preserving the previous cbmem API, the dynamic cbmem API allows for removing blocks from cbmem. This allows for the boot process to allocate memory that can be discarded after it's been used for performing more complex boot tasks in romstage. In order to plumb this support in there were some issues to work around regarding writing of coreboot tables. There were a few assumptions to how cbmem was layed out which dictated some ifdef guarding and other runtime checks so as not to incorrectly tag the e820 and coreboot memory tables. The example shown below is using dynamic cbmem infrastructure. The reserved memory for cbmem is less than 512KiB. coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000002ffff: RAM 2. 0000000000030000-000000000003ffff: RESERVED 3. 0000000000040000-000000000009ffff: RAM 4. 00000000000a0000-00000000000fffff: RESERVED 5. 0000000000100000-0000000000efffff: RAM 6. 0000000000f00000-0000000000ffffff: RESERVED 7. 0000000001000000-000000007bf80fff: RAM 8. 000000007bf81000-000000007bffffff: CONFIGURATION TABLES 9. 000000007c000000-000000007e9fffff: RESERVED 10. 00000000f0000000-00000000f3ffffff: RESERVED 11. 00000000fed10000-00000000fed19fff: RESERVED 12. 00000000fed84000-00000000fed84fff: RESERVED 13. 0000000100000000-00000001005fffff: RAM Wrote coreboot table at: 7bf81000, 0x39c bytes, checksum f5bf coreboot table: 948 bytes. CBMEM ROOT 0. 7bfff000 00001000 MRC DATA 1. 7bffe000 00001000 ROMSTAGE 2. 7bffd000 00001000 TIME STAMP 3. 7bffc000 00001000 ROMSTG STCK 4. 7bff7000 00005000 CONSOLE 5. 7bfe7000 00010000 VBOOT 6. 7bfe6000 00001000 RAMSTAGE 7. 7bf98000 0004e000 GDT 8. 7bf97000 00001000 ACPI 9. 7bf8b000 0000c000 ACPI GNVS 10. 7bf8a000 00001000 SMBIOS 11. 7bf89000 00001000 COREBOOT 12. 7bf81000 00008000 And the corresponding e820 entries: BIOS-e820: [mem 0x0000000000000000-0x0000000000000fff] type 16 BIOS-e820: [mem 0x0000000000001000-0x000000000002ffff] usable BIOS-e820: [mem 0x0000000000030000-0x000000000003ffff] reserved BIOS-e820: [mem 0x0000000000040000-0x000000000009ffff] usable BIOS-e820: [mem 0x00000000000a0000-0x00000000000fffff] reserved BIOS-e820: [mem 0x0000000000100000-0x0000000000efffff] usable BIOS-e820: [mem 0x0000000000f00000-0x0000000000ffffff] reserved BIOS-e820: [mem 0x0000000001000000-0x000000007bf80fff] usable BIOS-e820: [mem 0x000000007bf81000-0x000000007bffffff] type 16 BIOS-e820: [mem 0x000000007c000000-0x000000007e9fffff] reserved BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] reserved BIOS-e820: [mem 0x00000000fed10000-0x00000000fed19fff] reserved BIOS-e820: [mem 0x00000000fed84000-0x00000000fed84fff] reserved BIOS-e820: [mem 0x0000000100000000-0x00000001005fffff] usable Change-Id: Ie3bca52211800a8652a77ca684140cfc9b3b9a6b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2848 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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{
cbmem_initialize();
#if CONFIG_CONSOLE_CBMEM
cbmemc_reinit();
#endif
}
BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY,
init_cbmem_post_device, NULL),
};
int cbmem_base_check(void)
{
if (!cbmem_base) {
printk(BIOS_ERR, "ERROR: CBMEM Base is not set.\n");
// Are there any boards without?
// Stepan thinks we should die() here!
}
printk(BIOS_DEBUG, "CBMEM Base is %llx.\n", cbmem_base);
return !!cbmem_base;
}
void cbmem_add_lb_mem(struct lb_memory *mem)
{
lb_add_memory_range(mem, LB_MEM_TABLE, cbmem_base, cbmem_size);
}
void cbmem_list(void)
{
struct cbmem_entry *cbmem_toc;
int i;
cbmem_toc = get_cbmem_toc();
if (cbmem_toc == NULL)
return;
for (i = 0; i < MAX_CBMEM_ENTRIES; i++) {
if (cbmem_toc[i].magic != CBMEM_MAGIC)
continue;
cbmem: dynamic cbmem support This patch adds a parallel implementation of cbmem that supports dynamic sizing. The original implementation relied on reserving a fixed-size block of memory for adding cbmem entries. In order to allow for more flexibility for adding cbmem allocations the dynamic cbmem infrastructure was developed as an alternative to the fixed block approach. Also, the amount of memory to reserve for cbmem allocations does not need to be known prior to the first allocation. The dynamic cbmem code implements the same API as the existing cbmem code except for cbmem_init() and cbmem_reinit(). The add and find routines behave the same way. The dynamic cbmem infrastructure uses a top down allocator that starts allocating from a board/chipset defined function cbmem_top(). A root pointer lives just below cbmem_top(). In turn that pointer points to the root block which contains the entries for all the large alloctations. The corresponding block for each large allocation falls just below the previous entry. It should be noted that this implementation rounds all allocations up to a 4096 byte granularity. Though a packing allocator could be written for small allocations it was deemed OK to just fragment the memory as there shouldn't be that many small allocations. The result is less code with a tradeoff of some wasted memory. +----------------------+ <- cbmem_top() | +----| root pointer | | | +----------------------+ | | | |--------+ | +--->| root block |-----+ | | +----------------------+ | | | | | | | | | | | | | | alloc N |<----+ | | +----------------------+ | | | | | | | | | \|/ | alloc N + 1 |<-------+ v +----------------------+ In addition to preserving the previous cbmem API, the dynamic cbmem API allows for removing blocks from cbmem. This allows for the boot process to allocate memory that can be discarded after it's been used for performing more complex boot tasks in romstage. In order to plumb this support in there were some issues to work around regarding writing of coreboot tables. There were a few assumptions to how cbmem was layed out which dictated some ifdef guarding and other runtime checks so as not to incorrectly tag the e820 and coreboot memory tables. The example shown below is using dynamic cbmem infrastructure. The reserved memory for cbmem is less than 512KiB. coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000002ffff: RAM 2. 0000000000030000-000000000003ffff: RESERVED 3. 0000000000040000-000000000009ffff: RAM 4. 00000000000a0000-00000000000fffff: RESERVED 5. 0000000000100000-0000000000efffff: RAM 6. 0000000000f00000-0000000000ffffff: RESERVED 7. 0000000001000000-000000007bf80fff: RAM 8. 000000007bf81000-000000007bffffff: CONFIGURATION TABLES 9. 000000007c000000-000000007e9fffff: RESERVED 10. 00000000f0000000-00000000f3ffffff: RESERVED 11. 00000000fed10000-00000000fed19fff: RESERVED 12. 00000000fed84000-00000000fed84fff: RESERVED 13. 0000000100000000-00000001005fffff: RAM Wrote coreboot table at: 7bf81000, 0x39c bytes, checksum f5bf coreboot table: 948 bytes. CBMEM ROOT 0. 7bfff000 00001000 MRC DATA 1. 7bffe000 00001000 ROMSTAGE 2. 7bffd000 00001000 TIME STAMP 3. 7bffc000 00001000 ROMSTG STCK 4. 7bff7000 00005000 CONSOLE 5. 7bfe7000 00010000 VBOOT 6. 7bfe6000 00001000 RAMSTAGE 7. 7bf98000 0004e000 GDT 8. 7bf97000 00001000 ACPI 9. 7bf8b000 0000c000 ACPI GNVS 10. 7bf8a000 00001000 SMBIOS 11. 7bf89000 00001000 COREBOOT 12. 7bf81000 00008000 And the corresponding e820 entries: BIOS-e820: [mem 0x0000000000000000-0x0000000000000fff] type 16 BIOS-e820: [mem 0x0000000000001000-0x000000000002ffff] usable BIOS-e820: [mem 0x0000000000030000-0x000000000003ffff] reserved BIOS-e820: [mem 0x0000000000040000-0x000000000009ffff] usable BIOS-e820: [mem 0x00000000000a0000-0x00000000000fffff] reserved BIOS-e820: [mem 0x0000000000100000-0x0000000000efffff] usable BIOS-e820: [mem 0x0000000000f00000-0x0000000000ffffff] reserved BIOS-e820: [mem 0x0000000001000000-0x000000007bf80fff] usable BIOS-e820: [mem 0x000000007bf81000-0x000000007bffffff] type 16 BIOS-e820: [mem 0x000000007c000000-0x000000007e9fffff] reserved BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] reserved BIOS-e820: [mem 0x00000000fed10000-0x00000000fed19fff] reserved BIOS-e820: [mem 0x00000000fed84000-0x00000000fed84fff] reserved BIOS-e820: [mem 0x0000000100000000-0x00000001005fffff] usable Change-Id: Ie3bca52211800a8652a77ca684140cfc9b3b9a6b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2848 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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cbmem_print_entry(i, cbmem_toc[i].id, cbmem_toc[i].base,
cbmem_toc[i].size);
}
}
#endif