coreboot-kgpe-d16/src/arch/i386/lib/Config.lb

object c_start.S
object cpu.c
object pci_ops_conf1.c
object pci_ops_conf2.c
object pci_ops_auto.c
object exception.c
added config and other test files. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-06-17 18:51:06 +02:00			`object c_start.S`
			`object cpu.c`
- Update abuild.sh so it will rebuild successfull builds - Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-11-04 12:04:33 +01:00			`object pci_ops_conf1.c`
			`object pci_ops_conf2.c`
			`object pci_ops_auto.c`
- To reduce confuse rename the parts of linuxbios bios that run from ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-30 10:05:41 +02:00			`object exception.c`