coreboot-kgpe-d16/src/mainboard/asus/m5a88-v/Makefile.inc

ramstage-y += reset.c

#SB800 CIMx share AGESA V5 lib code
ifneq ($(CONFIG_CPU_AMD_AGESA),y)
 AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
 romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
 ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c

 AGESA_INC := -I$(AGESA_ROOT)/ \
	      -I$(AGESA_ROOT)/Include \
	      -I$(AGESA_ROOT)/Proc/IDS/ \
	      -I$(AGESA_ROOT)/Proc/CPU/ \
	      -I$(AGESA_ROOT)/Proc/CPU/Family

 CFLAGS += $(AGESA_INC)
endif
Add ASUS M5A88-V mainboard support it's a AMD 880+800 mainboard. I port the code based on the AMD reference code. update: 1.use CIMX instead of pmio 2.fix some whitespace 3.fix subsystemid of devicetree.cb Change-Id: I9725ccdbb25365c4007621318efee80b131fec29 Signed-off-by: QingPei Wang <wangqingpei@gmail.com> Reviewed-on: http://review.coreboot.org/205 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> 2011-09-13 11:54:12 +02:00			`ramstage-y += reset.c`

			`#SB800 CIMx share AGESA V5 lib code`
Rename AMD_AGESA to CPU_AMD_AGESA Also any CPU_AMD_AGESA_FAMILYxx selects CPU_AMD_AGESA, so remove the explicit selects from the mainboards. Change-Id: I4d71726bccd446b0f4db4e26448b5c91e406a641 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/792 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> 2012-03-16 14:40:56 +01:00			`ifneq ($(CONFIG_CPU_AMD_AGESA),y)`
Add ASUS M5A88-V mainboard support it's a AMD 880+800 mainboard. I port the code based on the AMD reference code. update: 1.use CIMX instead of pmio 2.fix some whitespace 3.fix subsystemid of devicetree.cb Change-Id: I9725ccdbb25365c4007621318efee80b131fec29 Signed-off-by: QingPei Wang <wangqingpei@gmail.com> Reviewed-on: http://review.coreboot.org/205 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> 2011-09-13 11:54:12 +02:00			`AGESA_ROOT ?= src/vendorcode/amd/agesa/f14`
			`romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c`
			`ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c`

			`AGESA_INC := -I$(AGESA_ROOT)/ \`
			`-I$(AGESA_ROOT)/Include \`
			`-I$(AGESA_ROOT)/Proc/IDS/ \`
			`-I$(AGESA_ROOT)/Proc/CPU/ \`
			`-I$(AGESA_ROOT)/Proc/CPU/Family`

			`CFLAGS += $(AGESA_INC)`
			`endif`