2011-02-22 15:35:05 +01:00
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2011 secunet Security Networks AG
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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2017-01-19 23:20:14 +01:00
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ifneq ($(NOCOMPILE),1)
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2018-01-14 11:38:30 +01:00
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GIT:=$(shell git -C "$(top)" rev-parse --git-dir 1>/dev/null 2>&1 \
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&& command -v git)
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2017-01-19 23:20:14 +01:00
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else
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GIT:=
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endif
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2015-03-04 15:02:03 +01:00
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2015-11-30 22:44:53 +01:00
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#######################################################################
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# normalize Kconfig variables in a central place
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CONFIG_CBFS_PREFIX:=$(call strip_quotes,$(CONFIG_CBFS_PREFIX))
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2015-09-16 18:10:52 +02:00
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CONFIG_FMDFILE:=$(call strip_quotes,$(CONFIG_FMDFILE))
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2016-08-08 23:12:11 +02:00
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CONFIG_DEVICETREE:=$(call strip_quotes, $(CONFIG_DEVICETREE))
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2015-11-30 22:44:53 +01:00
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2011-02-22 15:35:05 +01:00
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#######################################################################
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# misleadingly named, this is the coreboot version
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2016-04-20 04:15:16 +02:00
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ifeq ($(KERNELVERSION),)
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2016-01-24 16:00:50 +01:00
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ifeq ($(BUILD_TIMELESS),1)
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2017-08-23 23:48:13 +02:00
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KERNELVERSION := TIMELESS
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2016-01-24 16:00:50 +01:00
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else
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2017-08-23 23:48:13 +02:00
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KERNELVERSION := $(strip $(if $(GIT),\
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2015-03-04 15:02:03 +01:00
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$(shell git describe --dirty --always || git describe),\
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2015-07-13 20:43:28 +02:00
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$(if $(wildcard $(top)/.coreboot-version),\
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$(shell cat $(top)/.coreboot-version),\
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coreboot-unknown$(KERNELREVISION))))
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2016-01-24 16:00:50 +01:00
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endif
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2016-04-20 04:15:16 +02:00
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endif
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2017-08-23 23:48:13 +02:00
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COREBOOT_EXPORTS += KERNELVERSION
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2011-02-22 15:35:05 +01:00
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#######################################################################
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# Basic component discovery
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MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR))
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2016-11-16 22:03:43 +01:00
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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2017-08-23 23:48:13 +02:00
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COREBOOT_EXPORTS += MAINBOARDDIR VARIANT_DIR
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2011-02-22 15:35:05 +01:00
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2012-04-19 11:00:06 +02:00
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## Final build results, which CBFSTOOL uses to create the final
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## rom image file, are placed under $(objcbfs).
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## These typically have suffixes .debug .elf .bin and .map
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2017-08-23 23:48:13 +02:00
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objcbfs := $(obj)/cbfs/$(CONFIG_CBFS_PREFIX)
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COREBOOT_EXPORTS += objcbfs
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2012-04-19 11:00:06 +02:00
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## Based on the active configuration, Makefile conditionally collects
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## the required assembly includes and saves them in a file.
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## Such files that do not have a clear one-to-one relation to a source
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## file under src/ are placed and built under $(objgenerated)
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2017-08-23 23:48:13 +02:00
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objgenerated := $(obj)/generated
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COREBOOT_EXPORTS += objgenerated
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2012-04-19 11:00:06 +02:00
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2011-02-22 15:35:05 +01:00
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#######################################################################
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# root rule to resolve if in build mode (ie. configuration exists)
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2016-02-02 17:38:45 +01:00
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real-target: $(obj)/config.h coreboot files_added
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2016-05-31 08:03:58 +02:00
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coreboot: build-dirs $(obj)/coreboot.rom $(obj)/cbfstool $(obj)/rmodtool $(obj)/ifwitool
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2011-02-22 15:35:05 +01:00
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2016-01-25 03:38:33 +01:00
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# This target can be used in site local to run scripts or additional
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# targets after the build completes by creating a Makefile.inc in the
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# site-local directory with a target named 'build_complete::'
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build_complete:: coreboot
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2016-09-02 10:37:39 +02:00
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printf "\nBuilt %s (%s)\n" $(MAINBOARDDIR) \
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2016-01-25 03:38:33 +01:00
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$(CONFIG_MAINBOARD_PART_NUMBER)
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2016-02-02 17:38:45 +01:00
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# This target can be used to run rules after all files were added to CBFS,
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# for example to process FMAP regions or the entire image.
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files_added:: build_complete
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2011-02-22 15:35:05 +01:00
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#######################################################################
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# our phony targets
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2017-08-03 17:25:43 +02:00
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PHONY+= clean-abuild coreboot build-dirs build_complete
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2011-02-22 15:35:05 +01:00
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#######################################################################
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# root source directories of coreboot
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2015-09-08 20:34:43 +02:00
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subdirs-y := src/lib src/commonlib/ src/console src/device src/acpi
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2015-04-27 23:03:47 +02:00
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subdirs-y += src/ec/acpi $(wildcard src/ec/*/*) $(wildcard src/southbridge/*/*)
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2015-04-27 23:04:38 +02:00
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subdirs-y += $(wildcard src/soc/*/*) $(wildcard src/northbridge/*/*)
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2016-03-12 05:22:28 +01:00
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subdirs-y += src/superio
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subdirs-y += $(wildcard src/drivers/*) $(wildcard src/drivers/*/*)
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subdirs-y += src/cpu src/vendorcode
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2015-02-10 03:15:17 +01:00
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subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom
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2018-01-10 14:35:55 +01:00
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subdirs-y += util/futility util/marvell util/bincfg
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2015-04-27 23:02:36 +02:00
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subdirs-y += $(wildcard src/arch/*)
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2011-02-22 15:35:05 +01:00
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subdirs-y += src/mainboard/$(MAINBOARDDIR)
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2017-10-17 17:02:29 +02:00
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subdirs-y += src/security
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2016-02-17 03:40:47 +01:00
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subdirs-y += payloads payloads/external
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2011-02-22 15:35:05 +01:00
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2011-09-02 09:57:01 +02:00
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subdirs-y += site-local
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2017-07-31 19:52:58 +02:00
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subdirs-y += util/checklist util/testing
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2011-09-02 09:57:01 +02:00
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2011-02-22 15:35:05 +01:00
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#######################################################################
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# Add source classes and their build options
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Remove libverstage as separate library and source file class
In builds without CONFIG_VBOOT_SEPARATE_VERSTAGE, verstage files are
linked directly into the bootblock or the romstage. However, they're
still compiled with a separate "libverstage" source file class, linked
into an intermediate library and then linked into the final destination
stage.
There is no obvious benefit to doing it this way and it's unclear why it
was chosen in the first place... there are, however, obvious
disadvantages: it can result in code that is used by both libverstage
and the host stage to occur twice in the output binary. It also means
that libverstage files have their separate compiler flags that are not
necessarily aligned with the host stage, which can lead to weird effects
like <rules.h> macros not being set the way you would expect. In fact,
VBOOT_STARTS_IN_ROMSTAGE configurations are currently broken on x86
because their libverstage code that gets compiled into the romstage sets
ENV_VERSTAGE, but CAR migration code expects all ENV_VERSTAGE code to
run pre-migration.
This patch resolves these problems by removing the separate library.
There is no more difference between the 'verstage' and 'libverstage'
classes, and the source files added to them are just treated the same
way a bootblock or romstage source files in configurations where the
verstage is linked into either of these respective stages (allowing for
the normal object code deduplication and causing those files to be
compiled with the same flags as the host stage's files).
Tested this whole series by booting a Kevin, an Elm (both with and
without SEPARATE_VERSTAGE) and a Falco in normal and recovery mode.
Change-Id: I6bb84a9bf1cd54f2e02ca1f665740a9c88d88df4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18302
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-03-20 23:32:15 +01:00
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classes-y := ramstage romstage bootblock postcar smm smmstub cpu_microcode verstage
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2014-07-31 18:28:55 +02:00
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# Add dynamic classes for rmodules
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$(foreach supported_arch,$(ARCH_SUPPORTED), \
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$(eval $(call define_class,rmodules_$(supported_arch),$(supported_arch))))
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2015-09-05 19:59:26 +02:00
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# Provide a macro to determine environment for free standing rmodules.
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$(foreach supported_arch,$(ARCH_SUPPORTED), \
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$(eval rmodules_$(supported_arch)-generic-ccopts += -D__RMODULE__))
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2011-02-22 15:35:05 +01:00
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2014-11-12 19:11:50 +01:00
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#######################################################################
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2016-03-14 22:07:14 +01:00
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# Helper functions for math, strings, and various file placement matters.
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2015-07-03 20:54:14 +02:00
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# macros work on all formats understood by printf(1)
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# values are space separated if using more than one value
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2014-11-12 19:11:50 +01:00
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#
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2017-09-19 21:25:11 +02:00
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# int-add: adds an arbitrary length list of integers
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# int-subtract: subtracts the the second of two integers from the first
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# int-multiply: multiplies an arbitrary length list of integers
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# int-divide: divides the first integer by the second
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# int-remainder: arithmetic remainder of the first number divided by the second
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# int-shift-left: Shift $1 left by $2 bits
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# int-lt: 1 if the first value is less than the second. 0 otherwise
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# int-gt: 1 if the first values is greater than the second. 0 otherwise
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# int-eq: 1 if the two values are equal. 0 otherwise
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# int-align: align $1 to $2 units
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# file-size: returns the filesize of the given file
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# tolower: returns the value in all lowercase
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# toupper: returns the value in all uppercase
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# ws_to_under: returns the value with any whitespace changed to underscores
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2014-11-12 19:11:50 +01:00
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_toint=$(shell printf "%d" $1)
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_int-add2=$(shell expr $(call _toint,$1) + $(call _toint,$2))
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int-add=$(if $(filter 1,$(words $1)),$(strip $1),$(call int-add,$(call _int-add2,$(word 1,$1),$(word 2,$1)) $(wordlist 3,$(words $1),$1)))
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2015-07-03 20:54:14 +02:00
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int-subtract=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) - $(call _toint,$(word 2,$1))))
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_int-multiply2=$(shell expr $(call _toint,$1) \* $(call _toint,$2))
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int-multiply=$(if $(filter 1,$(words $1)),$(strip $1),$(call int-multiply,$(call _int-multiply2,$(word 1,$1),$(word 2,$1)) $(wordlist 3,$(words $1),$1)))
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int-divide=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) / $(call _toint,$(word 2,$1))))
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int-remainder=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) % $(call _toint,$(word 2,$1))))
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2017-09-19 21:25:11 +02:00
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int-shift-left=$(shell echo "$(call _toint,$(word 1, $1)) * (2 ^ $(call _toint,$(word 2, $1)))" | bc)
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2015-07-03 20:54:14 +02:00
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int-lt=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) \< $(call _toint,$(word 2,$1))))
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int-gt=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) \> $(call _toint,$(word 2,$1))))
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int-eq=$(if $(filter 1,$(words $1)),$(strip $1),$(shell expr $(call _toint,$(word 1,$1)) = $(call _toint,$(word 2,$1))))
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2014-12-03 11:20:51 +01:00
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int-align=$(shell A=$(call _toint,$1) B=$(call _toint,$2); expr $$A + \( \( $$B - \( $$A % $$B \) \) % $$B \) )
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2016-08-01 22:42:50 +02:00
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file-size=$(strip $(shell cat $1 | wc -c))
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2016-03-14 22:07:14 +01:00
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tolower=$(shell echo '$1' | tr '[:upper:]' '[:lower:]')
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toupper=$(shell echo '$1' | tr '[:lower:]' '[:upper:]')
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ws_to_under=$(shell echo '$1' | tr ' \t' '_')
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2014-11-12 19:11:50 +01:00
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2012-11-25 17:10:47 +01:00
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#######################################################################
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# Helper functions for ramstage postprocess
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spc :=
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spc +=
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$(spc) :=
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$(spc) +=
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2016-01-20 15:54:31 +01:00
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comma := ,
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2012-11-25 17:10:47 +01:00
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# files-in-dir-recursive,dir,files
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files-in-dir-recursive=$(filter $(1)%,$(2))
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# parent-dir,dir/
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2014-05-21 22:36:13 +02:00
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parent-dir=$(dir $(if $(patsubst /%,,$(1)),,/)$(subst $( ),/,$(strip $(subst /, ,$(1)))))
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2012-11-25 17:10:47 +01:00
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# filters out exactly the directory specified
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# filter-out-dir,dir_to_keep,dirs
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filter-out-dir=$(filter-out $(1),$(2))
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# filters out dir_to_keep and all its parents
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# filter-out-dirs,dir_to_keep,dirs
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2014-05-21 22:36:13 +02:00
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filter-out-dirs=$(if $(filter-out ./ /,$(1)),$(call filter-out-dirs,$(call parent-dir,$(1)),$(call filter-out-dir,$(1),$(2))),$(call filter-out-dir,$(1),$(2)))
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2012-11-25 17:10:47 +01:00
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# dir-wildcards,dirs
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dir-wildcards=$(addsuffix %,$(1))
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# files-in-dir,dir,files
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2014-05-21 22:36:13 +02:00
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files-in-dir=$(filter-out $(call dir-wildcards,$(call filter-out-dirs,$(1),$(sort $(dir $(2))))),$(call files-in-dir-recursive,$(1),$(2)))
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2012-11-25 17:10:47 +01:00
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#######################################################################
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# reduce command line length by linking the objects of each
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# directory into an intermediate file
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2014-12-05 21:32:09 +01:00
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ramstage-postprocess=$$(eval DEPENDENCIES+=$$(addsuffix .d,$$(basename $(1)))) \
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$(foreach d,$(sort $(dir $(filter-out %.ld,$(1)))), \
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2015-05-07 22:24:41 +02:00
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$(eval $(d)ramstage.a: $(call files-in-dir,$(d),$(filter-out %.ld,$(1))); rm -f $$@ && $(AR_ramstage) rcsT $$@ $$^ ) \
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$(eval ramstage-objs:=$(d)ramstage.a $(filter-out $(filter-out %.ld, $(call files-in-dir,$(d),$(1))),$(ramstage-objs))))
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2012-11-25 17:10:47 +01:00
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2014-09-16 07:10:33 +02:00
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bootblock-generic-ccopts += -D__PRE_RAM__ -D__BOOTBLOCK__
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romstage-generic-ccopts += -D__PRE_RAM__ -D__ROMSTAGE__
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ramstage-generic-ccopts += -D__RAMSTAGE__
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2011-09-02 23:23:41 +02:00
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ifeq ($(CONFIG_TRACE),y)
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2014-09-16 07:10:33 +02:00
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ramstage-c-ccopts += -finstrument-functions
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2011-09-02 23:23:41 +02:00
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endif
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Implement GCC code coverage analysis
In order to provide some insight on what code is executed during
coreboot's run time and how well our test scenarios work, this
adds code coverage support to coreboot's ram stage. This should
be easily adaptable for payloads, and maybe even romstage.
See http://gcc.gnu.org/onlinedocs/gcc/Gcov.html for
more information.
To instrument coreboot, select CONFIG_COVERAGE ("Code coverage
support") in Kconfig, and recompile coreboot. coreboot will then
store its code coverage information into CBMEM, if possible.
Then, run "cbmem -CV" as root on the target system running the
instrumented coreboot binary. This will create a whole bunch of
.gcda files that contain coverage information. Tar them up, copy
them to your build system machine, and untar them. Then you can
use your favorite coverage utility (gcov, lcov, ...) to visualize
code coverage.
For a sneak peak of what will expect you, please take a look
at http://www.coreboot.org/~stepan/coreboot-coverage/
Change-Id: Ib287d8309878a1f5c4be770c38b1bc0bb3aa6ec7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2052
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-19 01:23:28 +01:00
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ifeq ($(CONFIG_COVERAGE),y)
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2014-09-16 07:10:33 +02:00
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ramstage-c-ccopts += -fprofile-arcs -ftest-coverage
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Implement GCC code coverage analysis
In order to provide some insight on what code is executed during
coreboot's run time and how well our test scenarios work, this
adds code coverage support to coreboot's ram stage. This should
be easily adaptable for payloads, and maybe even romstage.
See http://gcc.gnu.org/onlinedocs/gcc/Gcov.html for
more information.
To instrument coreboot, select CONFIG_COVERAGE ("Code coverage
support") in Kconfig, and recompile coreboot. coreboot will then
store its code coverage information into CBMEM, if possible.
Then, run "cbmem -CV" as root on the target system running the
instrumented coreboot binary. This will create a whole bunch of
.gcda files that contain coverage information. Tar them up, copy
them to your build system machine, and untar them. Then you can
use your favorite coverage utility (gcov, lcov, ...) to visualize
code coverage.
For a sneak peak of what will expect you, please take a look
at http://www.coreboot.org/~stepan/coreboot-coverage/
Change-Id: Ib287d8309878a1f5c4be770c38b1bc0bb3aa6ec7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2052
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-19 01:23:28 +01:00
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endif
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2011-09-02 23:23:41 +02:00
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2016-04-20 04:15:16 +02:00
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|
|
ifneq ($(UPDATED_SUBMODULES),1)
|
2015-02-13 03:34:11 +01:00
|
|
|
# try to fetch non-optional submodules if the source is under git
|
2015-03-04 15:02:03 +01:00
|
|
|
forgetthis:=$(if $(GIT),$(shell git submodule update --init))
|
2012-04-30 21:06:10 +02:00
|
|
|
ifeq ($(CONFIG_USE_BLOBS),y)
|
2015-05-05 22:27:25 +02:00
|
|
|
# this is necessary because 3rdparty/blobs is update=none, and so is ignored
|
2014-10-29 15:50:32 +01:00
|
|
|
# unless explicitly requested and enabled through --checkout
|
2015-05-05 22:27:25 +02:00
|
|
|
forgetthis:=$(if $(GIT),$(shell git submodule update --init --checkout 3rdparty/blobs))
|
2012-04-30 21:06:10 +02:00
|
|
|
endif
|
2017-08-23 23:48:13 +02:00
|
|
|
UPDATED_SUBMODULES:=1
|
|
|
|
COREBOOT_EXPORTS += UPDATED_SUBMODULES
|
2016-04-20 04:15:16 +02:00
|
|
|
endif
|
2012-04-30 21:06:10 +02:00
|
|
|
|
2017-07-25 15:55:08 +02:00
|
|
|
postcar-c-deps:=$$(OPTION_TABLE_H)
|
2011-03-08 21:49:18 +01:00
|
|
|
ramstage-c-deps:=$$(OPTION_TABLE_H)
|
|
|
|
romstage-c-deps:=$$(OPTION_TABLE_H)
|
2015-01-14 19:51:47 +01:00
|
|
|
verstage-c-deps:=$$(OPTION_TABLE_H)
|
2013-01-31 18:09:24 +01:00
|
|
|
bootblock-c-deps:=$$(OPTION_TABLE_H)
|
2015-09-29 16:41:19 +02:00
|
|
|
$(foreach type,ads adb, \
|
|
|
|
$(foreach stage,$(COREBOOT_STANDARD_STAGES), \
|
|
|
|
$(eval $(stage)-$(type)-deps := $(obj)/libgnat-$(ARCH-$(stage)-y)/libgnat.a)))
|
2011-03-08 21:49:18 +01:00
|
|
|
|
2015-04-03 10:47:15 +02:00
|
|
|
# Add handler to copy linker scripts
|
|
|
|
define generic-objs_ld_template_gen
|
|
|
|
de$(EMPTY)fine $(1)-objs_ld_template
|
2015-04-04 15:50:20 +02:00
|
|
|
$$(call src-to-obj,$1,$$(1).ld): $$(1).ld $(obj)/config.h
|
2015-04-03 10:47:15 +02:00
|
|
|
@printf " CP $$$$(subst $$$$(obj)/,,$$$$(@))\n"
|
2015-09-30 01:41:11 +02:00
|
|
|
$$(CC_$(1)) -MMD $$(CPPFLAGS_$(1)) $$($(1)-ld-ccopts) $(PREPROCESS_ONLY) -include $(obj)/config.h -MT $$$$@ -o $$$$@ $$$$<
|
2015-04-03 10:47:15 +02:00
|
|
|
en$(EMPTY)def
|
|
|
|
endef
|
|
|
|
|
2015-04-27 18:01:12 +02:00
|
|
|
# Add handler to deal with archives
|
|
|
|
define generic-objs_a_template_gen
|
|
|
|
de$(EMPTY)fine $(1)-objs_a_template
|
|
|
|
$$(call src-to-obj,$1,$$(1).a): $$(1).a
|
2016-01-23 03:23:23 +01:00
|
|
|
@printf " AR $$$$(subst $$$$(obj)/,,$$$$(@))\n"
|
|
|
|
$$$$(AR_$(1)) rcsT $$$$@.tmp $$$$<
|
2015-04-27 18:01:12 +02:00
|
|
|
mv $$$$@.tmp $$$$@
|
|
|
|
en$(EMPTY)def
|
|
|
|
endef
|
|
|
|
|
2015-04-03 10:39:05 +02:00
|
|
|
# Add handler to add no rules for manual files
|
|
|
|
define generic-objs_manual_template_gen
|
|
|
|
# do nothing
|
|
|
|
endef
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
#######################################################################
|
|
|
|
# Add handler to compile ACPI's ASL
|
2015-07-30 19:44:58 +02:00
|
|
|
# arg1: base file name
|
|
|
|
# arg2: y or n for including in cbfs. defaults to y
|
2015-05-31 12:31:59 +02:00
|
|
|
define asl_template
|
2015-11-30 22:44:53 +01:00
|
|
|
$(CONFIG_CBFS_PREFIX)/$(1).aml-file = $(obj)/$(1).aml
|
|
|
|
$(CONFIG_CBFS_PREFIX)/$(1).aml-type = raw
|
|
|
|
$(CONFIG_CBFS_PREFIX)/$(1).aml-compression = none
|
|
|
|
cbfs-files-$(if $(2),$(2),y) += $(CONFIG_CBFS_PREFIX)/$(1).aml
|
2015-12-09 21:05:00 +01:00
|
|
|
-include $(obj)/$(1).d
|
2015-05-31 12:31:59 +02:00
|
|
|
$(obj)/$(1).aml: $(src)/mainboard/$(MAINBOARDDIR)/$(1).asl $(obj)/config.h
|
2011-02-22 15:35:05 +01:00
|
|
|
@printf " IASL $$(subst $(top)/,,$$(@))\n"
|
2015-04-07 17:40:42 +02:00
|
|
|
$(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) $$(CPPFLAGS_ramstage) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-ramstage-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$@
|
2015-06-25 17:36:27 +02:00
|
|
|
cd $$(dir $$@); $(IASL) -we -p $$(notdir $$@) $$(notdir $$@)
|
2016-04-13 02:47:11 +02:00
|
|
|
if [ -z "$$$$($(IASL) -d $$@ 2>&1 | grep 'ACPI Warning')" ]; then echo " IASL $$@ disassembled correctly."; true; else echo "Error: Could not correctly disassemble $$@"; $(IASL) -d $$@; false; fi
|
2011-02-22 15:35:05 +01:00
|
|
|
endef
|
|
|
|
|
2012-03-09 12:30:07 +01:00
|
|
|
#######################################################################
|
|
|
|
# Parse plaintext cmos defaults into binary format
|
|
|
|
# arg1: source file
|
|
|
|
# arg2: binary file name
|
|
|
|
cbfs-files-processor-nvramtool= \
|
|
|
|
$(eval $(2): $(1) $(src)/mainboard/$(MAINBOARDDIR)/cmos.layout | $(objutil)/nvramtool/nvramtool ; \
|
2015-11-25 19:17:42 +01:00
|
|
|
printf " CREATE $(2) (from $(1))\n"; \
|
|
|
|
$(objutil)/nvramtool/nvramtool -y $(src)/mainboard/$(MAINBOARDDIR)/cmos.layout -D $(2).tmp -p $(1) && \
|
|
|
|
mv $(2).tmp $(2))
|
2012-03-09 12:30:07 +01:00
|
|
|
|
2012-04-30 23:15:17 +02:00
|
|
|
#######################################################################
|
|
|
|
# Link VSA binary to ELF-ish stage
|
|
|
|
# arg1: source file
|
|
|
|
# arg2: binary file name
|
|
|
|
cbfs-files-processor-vsa= \
|
|
|
|
$(eval $(2): $(1) ; \
|
2015-11-25 19:17:42 +01:00
|
|
|
printf " CREATE $(2) (from $(1))\n"; \
|
|
|
|
$(OBJCOPY_ramstage) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && \
|
|
|
|
$(LD_ramstage) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2))
|
2012-04-30 23:15:17 +02:00
|
|
|
|
2015-11-25 18:47:56 +01:00
|
|
|
#######################################################################
|
|
|
|
# Reduce a .config file to its minimal representation
|
|
|
|
# arg1: input
|
|
|
|
# arg2: output
|
|
|
|
cbfs-files-processor-defconfig= \
|
2015-11-27 12:36:28 +01:00
|
|
|
$(eval $(2): $(1) $(obj)/build.h; \
|
2017-01-30 15:29:34 +01:00
|
|
|
+printf " CREATE $(2) (from $(1))\n"; \
|
2015-11-27 12:36:28 +01:00
|
|
|
printf "\# This image was built using coreboot " > $(2).tmp && \
|
|
|
|
grep "\<COREBOOT_VERSION\>" $(obj)/build.h |cut -d\" -f2 >> $(2).tmp && \
|
|
|
|
$(MAKE) DOTCONFIG=$(1) DEFCONFIG=$(2).tmp2 savedefconfig && \
|
|
|
|
cat $(2).tmp2 >> $(2).tmp && \
|
|
|
|
rm -f $(2).tmp2 && \
|
2015-11-25 18:47:56 +01:00
|
|
|
\mv -f $(2).tmp $(2))
|
|
|
|
|
2016-08-20 00:43:06 +02:00
|
|
|
#######################################################################
|
|
|
|
# Compile a C file with a bare struct definition into binary
|
|
|
|
# arg1: C source file
|
|
|
|
# arg2: binary file
|
|
|
|
cbfs-files-processor-struct= \
|
|
|
|
$(eval $(2): $(1) $(obj)/build.h $(KCONFIG_AUTOHEADER); \
|
|
|
|
printf " CC+STRIP $(@)\n"; \
|
2017-04-20 00:36:32 +02:00
|
|
|
$(CC_ramstage) -MMD $(CPPFLAGS_ramstage) $(CFLAGS_ramstage) $$(ramstage-c-ccopts) -include $(KCONFIG_AUTOHEADER) -MT $(2) -o $(2).tmp -c $(1) && \
|
2016-08-20 00:43:06 +02:00
|
|
|
$(OBJCOPY_ramstage) -O binary $(2).tmp $(2); \
|
|
|
|
rm -f $(2).tmp) \
|
|
|
|
$(eval DEPENDENCIES += $(2).d)
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
#######################################################################
|
|
|
|
# Add handler for arbitrary files in CBFS
|
|
|
|
$(call add-special-class,cbfs-files)
|
|
|
|
cbfs-files-handler= \
|
2012-03-09 12:30:07 +01:00
|
|
|
$(eval tmp-cbfs-method:=$(word 2, $(subst :, ,$($(2)-file)))) \
|
2012-11-15 14:51:54 +01:00
|
|
|
$(eval $(2)-file:=$(call strip_quotes,$(word 1, $(subst :, ,$($(2)-file))))) \
|
2015-11-25 18:59:54 +01:00
|
|
|
$(eval tmp-cbfs-file:= ) \
|
|
|
|
$(if $($(2)-file), \
|
|
|
|
$(if $(wildcard $(1)$($(2)-file)), \
|
|
|
|
$(eval tmp-cbfs-file:= $(wildcard $(1)$($(2)-file))), \
|
|
|
|
$(eval tmp-cbfs-file:= $($(2)-file)))) \
|
2013-02-16 01:06:57 +01:00
|
|
|
$(if $(strip $($(2)-required)), \
|
|
|
|
$(if $(wildcard $(tmp-cbfs-file)),, \
|
|
|
|
$(info This build configuration requires $($(2)-required)) \
|
|
|
|
$(eval FAILBUILD:=1) \
|
|
|
|
)) \
|
2014-12-09 12:49:21 +01:00
|
|
|
$(if $(strip $($(2)-align)), \
|
|
|
|
$(if $(strip $($(2)-position)), \
|
|
|
|
$(info ERROR: It is not allowed to specify both alignment and position for $($(2)-file)) \
|
|
|
|
$(eval FAILBUILD:=1) \
|
|
|
|
)) \
|
2012-03-09 12:30:07 +01:00
|
|
|
$(if $(tmp-cbfs-method), \
|
|
|
|
$(eval tmp-old-cbfs-file:=$(tmp-cbfs-file)) \
|
2012-09-21 18:11:59 +02:00
|
|
|
$(eval tmp-cbfs-file:=$(shell mkdir -p $(obj)/mainboard/$(MAINBOARDDIR); mktemp $(obj)/mainboard/$(MAINBOARDDIR)/cbfs-file.XXXXXX).out) \
|
2012-03-09 12:30:07 +01:00
|
|
|
$(call cbfs-files-processor-$(tmp-cbfs-method),$(tmp-old-cbfs-file),$(tmp-cbfs-file))) \
|
2015-11-25 18:59:54 +01:00
|
|
|
$(if $(tmp-cbfs-file), \
|
2016-08-10 13:29:03 +02:00
|
|
|
$(eval cbfs-files += $(subst $(spc),*,$(tmp-cbfs-file)|$(2)|$($(2)-type)|$($(2)-compression)|$(strip $($(2)-position))|$($(2)-align)|$($(2)-options)))) \
|
2011-02-22 15:35:05 +01:00
|
|
|
$(eval $(2)-name:=) \
|
|
|
|
$(eval $(2)-type:=) \
|
2012-08-14 19:01:53 +02:00
|
|
|
$(eval $(2)-compression:=) \
|
2013-02-16 01:06:57 +01:00
|
|
|
$(eval $(2)-position:=) \
|
2014-12-09 12:49:21 +01:00
|
|
|
$(eval $(2)-required:=) \
|
2015-11-26 16:37:45 +01:00
|
|
|
$(eval $(2)-options:=) \
|
2014-12-09 12:49:21 +01:00
|
|
|
$(eval $(2)-align:=)
|
2011-02-22 15:35:05 +01:00
|
|
|
|
|
|
|
#######################################################################
|
|
|
|
# a variety of flags for our build
|
2012-10-30 00:52:36 +01:00
|
|
|
CBFS_COMPRESS_FLAG:=none
|
2011-05-02 21:53:04 +02:00
|
|
|
ifeq ($(CONFIG_COMPRESS_RAMSTAGE),y)
|
2012-10-30 00:52:36 +01:00
|
|
|
CBFS_COMPRESS_FLAG:=LZMA
|
2011-05-02 21:53:04 +02:00
|
|
|
endif
|
|
|
|
|
2012-10-30 00:52:36 +01:00
|
|
|
CBFS_PAYLOAD_COMPRESS_FLAG:=none
|
2011-02-22 15:35:05 +01:00
|
|
|
ifeq ($(CONFIG_COMPRESSED_PAYLOAD_LZMA),y)
|
2012-10-30 00:52:36 +01:00
|
|
|
CBFS_PAYLOAD_COMPRESS_FLAG:=LZMA
|
2011-02-22 15:35:05 +01:00
|
|
|
endif
|
2016-07-23 17:11:44 +02:00
|
|
|
ifeq ($(CONFIG_COMPRESSED_PAYLOAD_LZ4),y)
|
|
|
|
CBFS_PAYLOAD_COMPRESS_FLAG:=LZ4
|
|
|
|
endif
|
2011-02-22 15:35:05 +01:00
|
|
|
|
2015-09-29 22:51:35 +02:00
|
|
|
CBFS_PRERAM_COMPRESS_FLAG:=none
|
|
|
|
ifeq ($(CONFIG_COMPRESS_PRERAM_STAGES),y)
|
|
|
|
CBFS_PRERAM_COMPRESS_FLAG:=LZ4
|
|
|
|
endif
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
ifneq ($(CONFIG_LOCALVERSION),"")
|
2017-08-23 23:48:13 +02:00
|
|
|
COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION))
|
|
|
|
COREBOOT_EXPORTS += COREBOOT_EXTRA_VERSION
|
2011-02-22 15:35:05 +01:00
|
|
|
endif
|
|
|
|
|
2015-09-08 20:34:43 +02:00
|
|
|
CPPFLAGS_common := -Isrc -Isrc/include -Isrc/commonlib/include -I$(obj)
|
2014-05-17 14:00:12 +02:00
|
|
|
CPPFLAGS_common += -Isrc/device/oprom/include
|
2016-07-24 12:10:38 +02:00
|
|
|
VBOOT_SOURCE ?= 3rdparty/vboot
|
|
|
|
CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/include
|
2014-05-17 14:00:12 +02:00
|
|
|
CPPFLAGS_common += -include $(src)/include/kconfig.h
|
2015-11-30 11:16:42 +01:00
|
|
|
CPPFLAGS_common += -I3rdparty
|
2011-02-22 15:35:05 +01:00
|
|
|
|
2016-11-29 10:30:44 +01:00
|
|
|
CFLAGS_common += -pipe -g -nostdinc -std=gnu11
|
Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
each of the three stages. This allows us to have an SOC with any combination of
architectures and thus every stage can be made to run on a completely different
architecture independent of others. Thus, bootblock can have an x86 arch whereas
romstage and ramstage can have arm32 and arm64 arch respectively. These stage
specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain
and compiler flags for every stage.
These options can be considered as either arch or modes eg: x86 running in
different modes or ARM having different arch types (v4, v7, v8). We have got rid
of the original CONFIG_ARCH option completely as every stage can have any
architecture of its own. Thus, almost all the components of coreboot are
identified as being part of one of the three stages (bootblock, romstage or
ramstage). The components which cannot be classified as such e.g. smm, rmodules
can have their own compiler toolset which is for now set to *_i386. Hence, all
special classes are treated in a similar way and the compiler toolset is defined
using create_class_compiler defined in Makefile.
In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the
toolsets are defined using create_class_compiler.
Few additional macros have been introduced to identify the class to be used at
various points, e.g.: CC_$(class) derives the $(class) part from the name of
the stage being compiled.
We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER
as they do not make any sense for coreboot as a whole. All these attributes are
associated with each of the stages.
Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/5577
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-04-23 19:18:48 +02:00
|
|
|
CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
|
|
|
|
CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
|
2016-01-24 16:00:50 +01:00
|
|
|
CFLAGS_common += -Wstrict-aliasing -Wshadow -Wdate-time
|
2015-07-31 22:50:03 +02:00
|
|
|
CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer
|
2016-10-23 20:38:36 +02:00
|
|
|
CFLAGS_common += -ffunction-sections -fdata-sections -fno-pie
|
2017-08-25 15:39:10 +02:00
|
|
|
ifeq ($(CONFIG_COMPILER_GCC),y)
|
2017-08-05 01:36:21 +02:00
|
|
|
CFLAGS_common += -fno-delete-null-pointer-checks -fconserve-stack
|
2017-08-25 15:39:10 +02:00
|
|
|
endif
|
2015-04-08 10:53:39 +02:00
|
|
|
|
2017-12-30 15:40:20 +01:00
|
|
|
ADAFLAGS_common += -gnatp
|
2016-01-14 01:13:33 +01:00
|
|
|
ADAFLAGS_common += -Wuninitialized -Wall -Werror
|
|
|
|
ADAFLAGS_common += -pipe -g -nostdinc
|
|
|
|
ADAFLAGS_common += -Wstrict-aliasing -Wshadow
|
|
|
|
ADAFLAGS_common += -fno-common -fomit-frame-pointer
|
|
|
|
ADAFLAGS_common += -ffunction-sections -fdata-sections
|
|
|
|
# Ada warning options:
|
|
|
|
#
|
|
|
|
# a Activate most optional warnings.
|
|
|
|
# .e Activate every optional warnings.
|
|
|
|
# e Treat warnings and style checks as errors.
|
|
|
|
#
|
|
|
|
# D Suppress warnings on implicit dereferences:
|
|
|
|
# As SPARK does not accept access types we have to map the
|
|
|
|
# dynamically chosen register locations to a static SPARK
|
|
|
|
# variable.
|
|
|
|
#
|
|
|
|
# .H Suppress warnings on holes/gaps in records:
|
|
|
|
# We are modelling hardware here!
|
|
|
|
#
|
|
|
|
# H Suppress warnings on hiding:
|
|
|
|
# It's too annoying, you run out of ideas for identifiers fast.
|
|
|
|
#
|
|
|
|
# T Suppress warnings for tracking of deleted conditional code:
|
|
|
|
# We use static options to select code paths at compile time.
|
|
|
|
#
|
|
|
|
# U Suppress warnings on unused entities:
|
|
|
|
# Would have lots of warnings for unused register definitions,
|
|
|
|
# `withs` for debugging etc.
|
|
|
|
#
|
|
|
|
# .U Deactivate warnings on unordered enumeration types:
|
|
|
|
# As SPARK doesn't support `pragma Ordered` by now, we don't
|
|
|
|
# use that, yet.
|
|
|
|
#
|
|
|
|
# .W Suppress warnings on unnecessary Warnings Off pragmas:
|
|
|
|
# Things get really messy when you use different compiler
|
|
|
|
# versions, otherwise.
|
|
|
|
# .Y Disable information messages for why package spec needs body:
|
|
|
|
# Those messages are annoying. But don't forget to enable those,
|
|
|
|
# if you need the information.
|
|
|
|
ADAFLAGS_common += -gnatwa.eeD.HHTU.U.W.Y
|
|
|
|
# Disable style checks for now
|
|
|
|
ADAFLAGS_common += -gnatyN
|
|
|
|
|
2015-09-06 17:15:17 +02:00
|
|
|
LDFLAGS_common := --gc-sections -nostdlib -nostartfiles -static --emit-relocs
|
|
|
|
|
2015-04-08 10:53:39 +02:00
|
|
|
ifeq ($(CONFIG_COMPILER_GCC),y)
|
|
|
|
# cf. commit f69a99db (coreboot: x86: enable gc-sections)
|
|
|
|
CFLAGS_common += -Wno-unused-but-set-variable
|
|
|
|
endif
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
|
Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
each of the three stages. This allows us to have an SOC with any combination of
architectures and thus every stage can be made to run on a completely different
architecture independent of others. Thus, bootblock can have an x86 arch whereas
romstage and ramstage can have arm32 and arm64 arch respectively. These stage
specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain
and compiler flags for every stage.
These options can be considered as either arch or modes eg: x86 running in
different modes or ARM having different arch types (v4, v7, v8). We have got rid
of the original CONFIG_ARCH option completely as every stage can have any
architecture of its own. Thus, almost all the components of coreboot are
identified as being part of one of the three stages (bootblock, romstage or
ramstage). The components which cannot be classified as such e.g. smm, rmodules
can have their own compiler toolset which is for now set to *_i386. Hence, all
special classes are treated in a similar way and the compiler toolset is defined
using create_class_compiler defined in Makefile.
In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the
toolsets are defined using create_class_compiler.
Few additional macros have been introduced to identify the class to be used at
various points, e.g.: CC_$(class) derives the $(class) part from the name of
the stage being compiled.
We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER
as they do not make any sense for coreboot as a whole. All these attributes are
associated with each of the stages.
Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/5577
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-04-23 19:18:48 +02:00
|
|
|
CFLAGS_common += -Werror
|
2011-02-22 15:35:05 +01:00
|
|
|
endif
|
2014-04-23 02:06:43 +02:00
|
|
|
ifneq ($(GDB_DEBUG),)
|
2015-03-15 00:21:17 +01:00
|
|
|
CFLAGS_common += -Og
|
2016-01-14 01:13:33 +01:00
|
|
|
ADAFLAGS_common += -Og
|
2014-04-23 02:06:43 +02:00
|
|
|
else
|
|
|
|
CFLAGS_common += -Os
|
2016-01-14 01:13:33 +01:00
|
|
|
ADAFLAGS_common += -Os
|
2014-04-23 02:06:43 +02:00
|
|
|
endif
|
|
|
|
|
2016-10-05 17:43:56 +02:00
|
|
|
ifeq ($(CONFIG_DEBUG_ADA_CODE),y)
|
|
|
|
ADAFLAGS_common += -gnata
|
|
|
|
endif
|
|
|
|
|
2013-06-19 16:16:05 +02:00
|
|
|
additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \
|
2016-11-08 19:49:58 +01:00
|
|
|
$(objutil)/ifdfake $(objutil)/options $(objutil)/amdfwtool \
|
2014-06-14 01:09:49 +02:00
|
|
|
$(objutil)/cbootimage $(objutil)/bimgtool
|
2011-02-22 15:35:05 +01:00
|
|
|
|
2017-08-23 23:48:13 +02:00
|
|
|
export $(COREBOOT_EXPORTS)
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
#######################################################################
|
|
|
|
# generate build support files
|
|
|
|
$(obj)/build.h: .xcompile
|
|
|
|
@printf " GEN build.h\n"
|
|
|
|
rm -f $(obj)/build.h
|
2015-02-13 03:32:41 +01:00
|
|
|
util/genbuild_h/genbuild_h.sh > $(obj)/build.ht
|
2011-02-22 15:35:05 +01:00
|
|
|
mv $(obj)/build.ht $(obj)/build.h
|
|
|
|
|
2012-04-19 11:00:06 +02:00
|
|
|
build-dirs:
|
|
|
|
mkdir -p $(objcbfs) $(objgenerated)
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
#######################################################################
|
|
|
|
# Build the tools
|
2014-07-10 09:42:03 +02:00
|
|
|
CBFSTOOL:=$(objutil)/cbfstool/cbfstool
|
2015-02-26 20:47:19 +01:00
|
|
|
FMAPTOOL:=$(objutil)/cbfstool/fmaptool
|
2014-07-10 09:42:03 +02:00
|
|
|
RMODTOOL:=$(objutil)/cbfstool/rmodtool
|
2016-05-31 08:03:58 +02:00
|
|
|
IFWITOOL:=$(objutil)/cbfstool/ifwitool
|
2011-02-22 15:35:05 +01:00
|
|
|
|
2014-07-10 09:42:03 +02:00
|
|
|
$(obj)/cbfstool: $(CBFSTOOL)
|
2011-02-22 15:35:05 +01:00
|
|
|
cp $< $@
|
|
|
|
|
2015-02-26 20:47:19 +01:00
|
|
|
$(obj)/fmaptool: $(FMAPTOOL)
|
|
|
|
cp $< $@
|
|
|
|
|
2014-07-10 09:42:03 +02:00
|
|
|
$(obj)/rmodtool: $(RMODTOOL)
|
2014-03-10 22:13:58 +01:00
|
|
|
cp $< $@
|
|
|
|
|
2016-05-31 08:03:58 +02:00
|
|
|
$(obj)/ifwitool: $(IFWITOOL)
|
|
|
|
cp $< $@
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
_WINCHECK=$(shell uname -o 2> /dev/null)
|
|
|
|
STACK=
|
|
|
|
ifeq ($(_WINCHECK),Msys)
|
|
|
|
STACK=-Wl,--stack,16384000
|
|
|
|
endif
|
|
|
|
ifeq ($(_WINCHECK),Cygwin)
|
|
|
|
STACK=-Wl,--stack,16384000
|
|
|
|
endif
|
|
|
|
|
2014-05-17 19:05:56 +02:00
|
|
|
# this allows ccache to prepend itself
|
|
|
|
# (ccache handling happens first)
|
|
|
|
ROMCC_BIN= $(objutil)/romcc/romcc
|
|
|
|
ROMCC?=$(ROMCC_BIN)
|
|
|
|
$(ROMCC_BIN): $(top)/util/romcc/romcc.c
|
2011-02-22 15:35:05 +01:00
|
|
|
@printf " HOSTCC $(subst $(obj)/,,$(@)) (this may take a while)\n"
|
|
|
|
@# Note: Adding -O2 here might cause problems. For details see:
|
2017-06-05 12:33:23 +02:00
|
|
|
@# https://www.coreboot.org/pipermail/coreboot/2010-February/055825.html
|
2011-02-22 15:35:05 +01:00
|
|
|
$(HOSTCC) -g $(STACK) -Wall -o $@ $<
|
|
|
|
|
2018-01-10 14:35:55 +01:00
|
|
|
BINCFG:=$(objutil)/bincfg/bincfg
|
2017-10-20 22:09:12 +02:00
|
|
|
|
2012-08-16 23:05:42 +02:00
|
|
|
IFDTOOL:=$(objutil)/ifdtool/ifdtool
|
2016-09-10 14:01:08 +02:00
|
|
|
$(IFDTOOL):
|
|
|
|
@printf " Compile IFDTOOL\n"
|
2017-01-30 15:29:34 +01:00
|
|
|
+$(MAKE) -C $(top)/util/ifdtool
|
2016-09-10 14:01:08 +02:00
|
|
|
cp -a $(top)/util/ifdtool/ifdtool $@
|
2012-08-16 23:05:42 +02:00
|
|
|
|
2013-06-19 16:16:05 +02:00
|
|
|
IFDFAKE:=$(objutil)/ifdfake/ifdfake
|
|
|
|
$(IFDFAKE): $(top)/util/ifdfake/ifdfake.c
|
|
|
|
@printf " HOSTCC $(subst $(obj)/,,$(@))\n"
|
|
|
|
$(HOSTCC) $(HOSTCFLAGS) -o $@ $<
|
|
|
|
|
2016-11-08 19:49:58 +01:00
|
|
|
AMDFWTOOL:=$(objutil)/amdfwtool/amdfwtool
|
2015-11-17 15:57:39 +01:00
|
|
|
$(AMDFWTOOL): $(top)/util/amdfwtool/amdfwtool.c
|
2014-08-11 01:09:15 +02:00
|
|
|
@printf " HOSTCC $(subst $(obj)/,,$(@))\n"
|
2015-11-17 15:57:39 +01:00
|
|
|
$(HOSTCC) $(HOSTCFLAGS) -DCONFIG_ROM_SIZE=$(CONFIG_ROM_SIZE) -o $@ $<
|
2014-08-11 01:09:15 +02:00
|
|
|
|
2014-09-08 23:28:17 +02:00
|
|
|
CBOOTIMAGE:=$(objutil)/cbootimage/cbootimage
|
|
|
|
|
2016-03-15 23:14:08 +01:00
|
|
|
FUTILITY?=$(objutil)/futility/futility
|
2016-02-01 12:03:04 +01:00
|
|
|
|
2014-09-27 11:37:46 +02:00
|
|
|
subdirs-y += util/nvidia
|
2014-09-08 23:28:17 +02:00
|
|
|
|
2014-06-14 01:09:49 +02:00
|
|
|
BIMGTOOL:=$(objutil)/bimgtool/bimgtool
|
|
|
|
$(BIMGTOOL): $(top)/util/bimgtool/bimgtool.c
|
|
|
|
@printf " HOSTCC $(subst $(obj)/,,$(@))\n"
|
|
|
|
$(HOSTCC) $(HOSTCFLAGS) -o $@ $<
|
|
|
|
|
2016-02-29 05:04:15 +01:00
|
|
|
$(obj)/config.h: $(objutil)/kconfig/conf
|
|
|
|
|
2011-02-22 15:35:05 +01:00
|
|
|
#######################################################################
|
|
|
|
# needed objects that every mainboard uses
|
|
|
|
# Creation of these is architecture and mainboard independent
|
2016-08-08 23:12:11 +02:00
|
|
|
DEVICETREE_FILE := $(src)/mainboard/$(MAINBOARDDIR)/$(CONFIG_DEVICETREE)
|
2016-08-05 23:46:56 +02:00
|
|
|
DEVICETREE_STATIC_C := $(obj)/mainboard/$(MAINBOARDDIR)/static.c
|
|
|
|
|
|
|
|
$(DEVICETREE_STATIC_C): $(DEVICETREE_FILE) $(objutil)/sconfig/sconfig
|
2011-02-22 15:35:05 +01:00
|
|
|
@printf " SCONFIG $(subst $(src)/,,$(<))\n"
|
2016-08-05 23:46:56 +02:00
|
|
|
mkdir -p $(dir $(DEVICETREE_STATIC_C))
|
2016-08-06 02:15:06 +02:00
|
|
|
$(objutil)/sconfig/sconfig $(DEVICETREE_FILE) $(DEVICETREE_STATIC_C)
|
2011-02-22 15:35:05 +01:00
|
|
|
|
2016-08-05 23:46:56 +02:00
|
|
|
ramstage-y+=$(DEVICETREE_STATIC_C)
|
|
|
|
romstage-y+=$(DEVICETREE_STATIC_C)
|
|
|
|
verstage-y+=$(DEVICETREE_STATIC_C)
|
|
|
|
bootblock-y+=$(DEVICETREE_STATIC_C)
|
2017-04-17 05:13:39 +02:00
|
|
|
postcar-y+=$(DEVICETREE_STATIC_C)
|
2011-02-22 15:35:05 +01:00
|
|
|
|
|
|
|
#######################################################################
|
|
|
|
# Clean up rules
|
|
|
|
clean-abuild:
|
|
|
|
rm -rf coreboot-builds
|
|
|
|
|
2016-03-08 00:38:52 +01:00
|
|
|
clean-for-update-target: clean-payloads
|
2016-01-23 01:24:33 +01:00
|
|
|
rm -f $(obj)/ramstage?* $(obj)/coreboot.romstage $(obj)/coreboot.pre* $(obj)/coreboot.bootblock $(obj)/coreboot.a
|
|
|
|
rm -rf $(obj)/bootblock?* $(obj)/romstage?* $(obj)/location.*
|
2011-02-22 15:35:05 +01:00
|
|
|
rm -f $(obj)/option_table.* $(obj)/crt0.S $(obj)/ldscript
|
|
|
|
rm -f $(obj)/mainboard/$(MAINBOARDDIR)/static.c $(obj)/mainboard/$(MAINBOARDDIR)/config.py $(obj)/mainboard/$(MAINBOARDDIR)/static.dot
|
|
|
|
rm -f $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s $(obj)/mainboard/$(MAINBOARDDIR)/crt0.disasm
|
|
|
|
rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
|
2016-01-04 18:44:13 +01:00
|
|
|
rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/dsdt.*
|
2011-02-22 15:35:05 +01:00
|
|
|
rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm
|
|
|
|
|
|
|
|
clean-target:
|
|
|
|
rm -f $(obj)/coreboot*
|
|
|
|
|
|
|
|
#######################################################################
|
|
|
|
# Development utilities
|
|
|
|
printcrt0s:
|
|
|
|
@echo crt0s=$(crt0s)
|
|
|
|
@echo ldscripts=$(ldscripts)
|
|
|
|
|
|
|
|
update:
|
|
|
|
dongle.py -c /dev/term/1 $(obj)/coreboot.rom EOF
|
|
|
|
|
2011-06-05 15:15:49 +02:00
|
|
|
gitconfig:
|
2017-12-13 23:21:33 +01:00
|
|
|
util/gitconfig/gitconfig.sh
|
2011-06-05 15:15:49 +02:00
|
|
|
|
2016-01-30 02:48:47 +01:00
|
|
|
include util/crossgcc/Makefile.inc
|
2011-05-16 17:32:28 +02:00
|
|
|
|
2016-01-30 02:48:47 +01:00
|
|
|
.PHONY: tools
|
2018-01-10 14:35:55 +01:00
|
|
|
tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(IFDFAKE) $(CBOOTIMAGE) $(AMDFWTOOL) $(FUTILITY) $(BINCFG)
|
2011-11-05 14:44:41 +01:00
|
|
|
|
2014-04-23 01:33:22 +02:00
|
|
|
###########################################################################
|
|
|
|
# Common recipes for all stages
|
|
|
|
###########################################################################
|
|
|
|
|
New mechanism to define SRAM/memory map with automatic bounds checking
This patch creates a new mechanism to define the static memory layout
(primarily in SRAM) for a given board, superseding the brittle mass of
Kconfigs that we were using before. The core part is a memlayout.ld file
in the mainboard directory (although boards are expected to just include
the SoC default in most cases), which is the primary linker script for
all stages (though not rmodules for now). It uses preprocessor macros
from <memlayout.h> to form a different valid linker script for all
stages while looking like a declarative, boilerplate-free map of memory
addresses to the programmer. Linker asserts will automatically guarantee
that the defined regions cannot overlap. Stages are defined with a
maximum size that will be enforced by the linker. The file serves to
both define and document the memory layout, so that the documentation
cannot go missing or out of date.
The mechanism is implemented for all boards in the ARM, ARM64 and MIPS
architectures, and should be extended onto all systems using SRAM in the
future. The CAR/XIP environment on x86 has very different requirements
and the layout is generally not as static, so it will stay like it is
and be unaffected by this patch (save for aligning some symbol names for
consistency and sharing the new common ramstage linker script include).
BUG=None
TEST=Booted normally and in recovery mode, checked suspend/resume and
the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and
Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies
with ToT and looked for red flags.
Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614
Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/213370
Reviewed-on: http://review.coreboot.org/9283
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-08-21 00:29:56 +02:00
|
|
|
# loadaddr can determine the load address of a stage, which may be needed for
|
|
|
|
# platform-specific image headers (only works *after* the stage has been built)
|
|
|
|
loadaddr = $(shell $(OBJDUMP_$(1)) -p $(objcbfs)/$(1).debug | \
|
|
|
|
sed -ne '/LOAD/s/^.*vaddr 0x\([0-9a-fA-F]\{8\}\).*$$/0x\1/p')
|
|
|
|
|
Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
each of the three stages. This allows us to have an SOC with any combination of
architectures and thus every stage can be made to run on a completely different
architecture independent of others. Thus, bootblock can have an x86 arch whereas
romstage and ramstage can have arm32 and arm64 arch respectively. These stage
specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain
and compiler flags for every stage.
These options can be considered as either arch or modes eg: x86 running in
different modes or ARM having different arch types (v4, v7, v8). We have got rid
of the original CONFIG_ARCH option completely as every stage can have any
architecture of its own. Thus, almost all the components of coreboot are
identified as being part of one of the three stages (bootblock, romstage or
ramstage). The components which cannot be classified as such e.g. smm, rmodules
can have their own compiler toolset which is for now set to *_i386. Hence, all
special classes are treated in a similar way and the compiler toolset is defined
using create_class_compiler defined in Makefile.
In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the
toolsets are defined using create_class_compiler.
Few additional macros have been introduced to identify the class to be used at
various points, e.g.: CC_$(class) derives the $(class) part from the name of
the stage being compiled.
We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER
as they do not make any sense for coreboot as a whole. All these attributes are
associated with each of the stages.
Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/5577
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-04-23 19:18:48 +02:00
|
|
|
# find-substr is required for stages like romstage_null and romstage_xip to
|
|
|
|
# eliminate the _* part of the string
|
|
|
|
find-substr = $(word 1,$(subst _, ,$(1)))
|
|
|
|
|
|
|
|
# find-class is used to identify the class from the name of the stage
|
|
|
|
# The input to this macro can be something like romstage.x or romstage.x.y
|
|
|
|
# find-class recursively strips off the suffixes to extract the exact class name
|
|
|
|
# e.g.: if romstage.x is provided to find-class, it will remove .x and return romstage
|
|
|
|
# if romstage.x.y is provided, it will first remove .y, call find-class with romstage.x
|
|
|
|
# and remove .x the next time and finally return romstage
|
|
|
|
find-class = $(if $(filter $(1),$(basename $(1))),$(if $(CC_$(1)), $(1), $(call find-substr,$(1))),$(call find-class,$(basename $(1))))
|
|
|
|
|
2015-09-18 00:02:53 +02:00
|
|
|
# Bootblocks are not CBFS stages. coreboot is currently expecting the bss to
|
|
|
|
# be cleared by the loader of the stage. For ARM SoCs that means one needs to
|
|
|
|
# include the bss section in the binary so the BootROM clears the bss on
|
|
|
|
# loading of the bootblock stage. Achieve this by marking the bss section
|
|
|
|
# loadable,allocatable, and data. Do the same for the .data section in case
|
|
|
|
# it's marked as NOBITS.
|
|
|
|
$(objcbfs)/bootblock.raw.bin: $(objcbfs)/bootblock.elf
|
|
|
|
@printf " OBJCOPY $(notdir $(@))\n"
|
|
|
|
$(OBJCOPY_bootblock) --set-section-flags .bss=load,alloc,data --set-section-flags .data=load,alloc,data $< $<.tmp
|
|
|
|
$(OBJCOPY_bootblock) -O binary $<.tmp $@
|
|
|
|
|
|
|
|
$(objcbfs)/%.bin: $(objcbfs)/%.raw.bin
|
|
|
|
cp $< $@
|
2014-04-23 01:33:22 +02:00
|
|
|
|
|
|
|
$(objcbfs)/%.elf: $(objcbfs)/%.debug
|
Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
each of the three stages. This allows us to have an SOC with any combination of
architectures and thus every stage can be made to run on a completely different
architecture independent of others. Thus, bootblock can have an x86 arch whereas
romstage and ramstage can have arm32 and arm64 arch respectively. These stage
specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain
and compiler flags for every stage.
These options can be considered as either arch or modes eg: x86 running in
different modes or ARM having different arch types (v4, v7, v8). We have got rid
of the original CONFIG_ARCH option completely as every stage can have any
architecture of its own. Thus, almost all the components of coreboot are
identified as being part of one of the three stages (bootblock, romstage or
ramstage). The components which cannot be classified as such e.g. smm, rmodules
can have their own compiler toolset which is for now set to *_i386. Hence, all
special classes are treated in a similar way and the compiler toolset is defined
using create_class_compiler defined in Makefile.
In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the
toolsets are defined using create_class_compiler.
Few additional macros have been introduced to identify the class to be used at
various points, e.g.: CC_$(class) derives the $(class) part from the name of
the stage being compiled.
We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER
as they do not make any sense for coreboot as a whole. All these attributes are
associated with each of the stages.
Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/5577
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-04-23 19:18:48 +02:00
|
|
|
$(eval class := $(call find-class,$(@F)))
|
2014-04-23 01:33:22 +02:00
|
|
|
@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
|
|
|
|
cp $< $@.tmp
|
Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
each of the three stages. This allows us to have an SOC with any combination of
architectures and thus every stage can be made to run on a completely different
architecture independent of others. Thus, bootblock can have an x86 arch whereas
romstage and ramstage can have arm32 and arm64 arch respectively. These stage
specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain
and compiler flags for every stage.
These options can be considered as either arch or modes eg: x86 running in
different modes or ARM having different arch types (v4, v7, v8). We have got rid
of the original CONFIG_ARCH option completely as every stage can have any
architecture of its own. Thus, almost all the components of coreboot are
identified as being part of one of the three stages (bootblock, romstage or
ramstage). The components which cannot be classified as such e.g. smm, rmodules
can have their own compiler toolset which is for now set to *_i386. Hence, all
special classes are treated in a similar way and the compiler toolset is defined
using create_class_compiler defined in Makefile.
In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the
toolsets are defined using create_class_compiler.
Few additional macros have been introduced to identify the class to be used at
various points, e.g.: CC_$(class) derives the $(class) part from the name of
the stage being compiled.
We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER
as they do not make any sense for coreboot as a whole. All these attributes are
associated with each of the stages.
Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/5577
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2014-04-23 19:18:48 +02:00
|
|
|
$(NM_$(class)) -n $@.tmp | sort > $(basename $@).map
|
|
|
|
$(OBJCOPY_$(class)) --strip-debug $@.tmp
|
|
|
|
$(OBJCOPY_$(class)) --add-gnu-debuglink=$< $@.tmp
|
2014-04-23 01:33:22 +02:00
|
|
|
mv $@.tmp $@
|
|
|
|
|
|
|
|
###########################################################################
|
|
|
|
# Build the final rom image
|
|
|
|
###########################################################################
|
|
|
|
|
2015-12-11 19:40:06 +01:00
|
|
|
# extract_nth - Return a subsection of the $file string
|
|
|
|
#
|
|
|
|
# the input string looks like this:
|
|
|
|
# ./build/cbfs/fallback/romstage.elf|fallback/romstage|stage|none||64|--xip*-S*.car.data*-P*0x10000
|
|
|
|
#
|
|
|
|
# Sections:
|
|
|
|
# 1 - Path and name of file [FILENAME: Added to cbfs-files-y list variable]
|
|
|
|
# 2 - Name of file in cbfs [$(FILENAME)-file]
|
|
|
|
# 3 - File type: [$(FILENAME)-type]
|
|
|
|
# bootblock, cbfs header, stage, payload, optionrom, bootsplash, raw, vsa,
|
|
|
|
# mbi, microcode, fsp, mrc, cmos_default, cmos_layout, spd, mrc_cache,
|
|
|
|
# mma, efi, deleted, null
|
|
|
|
# 4 - Compression type [$(FILENAME)-compression]
|
|
|
|
# none, LZMA
|
|
|
|
# 5 - Base address [$(FILANAME)-position]
|
|
|
|
# 6 - Alignment [$(FILENAME)-align]
|
|
|
|
# 7 - cbfstool flags [$(FILENAME)-options]
|
|
|
|
#
|
|
|
|
# Input:
|
|
|
|
# $(1) = Section to extract
|
|
|
|
# $(2) = Input string
|
|
|
|
#
|
|
|
|
# Steps:
|
|
|
|
# 1) replace all '|' characters with the sequence '- -' within the full string, prepended and appended with the character '-'
|
|
|
|
# 2) extract the specified section from the string - this gets us the section surrounded by '-' characters
|
|
|
|
# 3) remove the leading and trailing '-' characters
|
|
|
|
# 4) replace all '*' characters with spaces
|
2015-11-26 17:17:28 +01:00
|
|
|
extract_nth=$(subst *,$(spc),$(patsubst -%-,%,$(word $(1), $(subst |,- -,-$(2)-))))
|
2014-04-23 01:33:22 +02:00
|
|
|
|
2016-01-18 16:24:10 +01:00
|
|
|
# regions-for-file - Returns a cbfstool regions parameter
|
|
|
|
# $(call regions-for-file,$(filename))
|
|
|
|
# returns "REGION1,REGION2,..."
|
|
|
|
#
|
|
|
|
# This is the default implementation. When using a boot strategy employing
|
|
|
|
# multiple CBFSes in fmap regions, override it.
|
|
|
|
regions-for-file ?= COREBOOT
|
|
|
|
|
2016-01-14 15:08:36 +01:00
|
|
|
ifeq ($(CONFIG_CBFS_AUTOGEN_ATTRIBUTES),y)
|
|
|
|
cbfs-autogen-attributes=-g
|
|
|
|
endif
|
|
|
|
|
2016-01-28 22:22:38 +01:00
|
|
|
# cbfs-add-cmd-for-region
|
|
|
|
# $(call cbfs-add-cmd-for-region,file in extract_nth format,region name)
|
|
|
|
define cbfs-add-cmd-for-region
|
2016-01-28 21:32:33 +01:00
|
|
|
$(CBFSTOOL) $@.tmp \
|
2015-12-11 20:24:33 +01:00
|
|
|
add$(if $(filter stage,$(call extract_nth,3,$(1))),-stage)$(if \
|
|
|
|
$(filter payload,$(call extract_nth,3,$(1))),-payload)$(if \
|
|
|
|
$(filter flat-binary,$(call extract_nth,3,$(1))),-flat-binary) \
|
2016-01-28 21:47:31 +01:00
|
|
|
-f $(call extract_nth,1,$(1)) \
|
|
|
|
-n $(call extract_nth,2,$(1)) \
|
2015-12-11 20:24:33 +01:00
|
|
|
$(if $(filter-out flat-binary,$(filter-out stage,$(call \
|
|
|
|
extract_nth,3,$(1)))),-t $(call extract_nth,3,$(1))) \
|
2016-01-28 21:51:55 +01:00
|
|
|
$(if $(call extract_nth,4,$(1)),-c $(call extract_nth,4,$(1))) \
|
|
|
|
$(cbfs-autogen-attributes) \
|
2016-01-28 22:22:38 +01:00
|
|
|
-r $(2) \
|
2016-05-06 23:01:25 +02:00
|
|
|
$(if $(call extract_nth,6,$(1)),-a $(call extract_nth,6,$(file)), \
|
|
|
|
$(if $(call extract_nth,5,$(file)),-b $(call extract_nth,5,$(file)))) \
|
2016-08-10 17:06:12 +02:00
|
|
|
$(call extract_nth,7,$(1))
|
2016-05-06 23:01:25 +02:00
|
|
|
|
2016-01-28 22:22:38 +01:00
|
|
|
|
|
|
|
endef
|
|
|
|
# Empty line before endef is necessary so cbfs-add-cmd-for-region ends in a
|
|
|
|
# newline
|
|
|
|
|
|
|
|
# cbfs-add-cmd
|
2016-08-09 20:19:19 +02:00
|
|
|
# $(call cbfs-add-cmd,
|
|
|
|
# file in extract_nth format,
|
|
|
|
# region name,
|
|
|
|
# non-empty if file removal requested)
|
2016-01-28 22:22:38 +01:00
|
|
|
define cbfs-add-cmd
|
|
|
|
printf " CBFS $(call extract_nth,2,$(1))\n"
|
2016-08-09 20:19:19 +02:00
|
|
|
$(if $(3),-$(CBFSTOOL) $@.tmp remove -n $(call extract_nth,2,$(file)) 2>/dev/null)
|
|
|
|
$(call cbfs-add-cmd-for-region,$(1),$(2))
|
2016-01-28 21:37:16 +01:00
|
|
|
endef
|
2014-12-09 12:49:21 +01:00
|
|
|
|
2016-08-09 20:19:19 +02:00
|
|
|
# list of files to add (using their file system names, not CBFS names),
|
|
|
|
# for dependencies etc.
|
2014-04-23 01:33:22 +02:00
|
|
|
prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
|
2016-08-09 20:19:19 +02:00
|
|
|
|
|
|
|
# $(all-regions)
|
|
|
|
# returns full list of fmap regions that we add files to
|
|
|
|
all-regions = $(sort $(subst $(comma),$(spc), \
|
|
|
|
$(foreach file,$(cbfs-files), \
|
|
|
|
$(call regions-for-file,$(call extract_nth,2,$(file))))))
|
|
|
|
|
|
|
|
# $(call all-files-in-region,region name)
|
|
|
|
# returns elements in $(cbfs-files) that end up in that region, in the order
|
|
|
|
# they appear in $(cbfs-files)
|
|
|
|
all-files-in-region = $(foreach file,$(cbfs-files), \
|
|
|
|
$(if $(filter $(1), \
|
|
|
|
$(subst $(comma),$(spc),$(call regions-for-file,$(call extract_nth,2,$(file))))), \
|
|
|
|
$(file)))
|
|
|
|
|
2016-08-10 17:02:58 +02:00
|
|
|
# $(call update-file-for-region,file string from $(cbfs-files),region name)
|
|
|
|
# Update position and alignment according to overrides for region
|
|
|
|
# Doesn't check for invalid configurations (eg. resetting neither or both
|
|
|
|
# position and align)
|
|
|
|
# Returns the updated file string
|
|
|
|
update-file-for-region = \
|
|
|
|
$(subst $(spc),*,$(call extract_nth,1,$(1))|$(call extract_nth,2,$(1))|$(call extract_nth,3,$(1))|$(call extract_nth,4,$(1))|$($(call extract_nth,2,$(1))-$(2)-position)|$($(call extract_nth,2,$(1))-$(2)-align)|$(call extract_nth,7,$(1)))
|
|
|
|
|
|
|
|
# $(call placed-files-in-region,region name)
|
|
|
|
# like all-files-in-region, but updates the files to contain region overrides
|
|
|
|
# to position or alignment.
|
|
|
|
placed-files-in-region = $(foreach file,$(call all-files-in-region,$(1)), \
|
|
|
|
$(if $($(call extract_nth,2,$(file))-$(1)-position), \
|
|
|
|
$(if $($(call extract_nth,2,$(file))-$(1)-align), \
|
|
|
|
$(error It is not allowed to specify both alignment and position for $(call extract_nth,2,$(file))-$(1))) \
|
|
|
|
$(call update-file-for-region,$(file),$(1)), \
|
|
|
|
$(if $($(call extract_nth,2,$(file))-$(1)-align), \
|
|
|
|
$(call update-file-for-region,$(file),$(1)), \
|
|
|
|
$(file))))
|
|
|
|
|
2016-08-10 13:25:02 +02:00
|
|
|
# $(call sort-files,subset of $(cbfs-files))
|
|
|
|
# reorders the files in the given set to list files at fixed positions first,
|
|
|
|
# followed by aligned files and finally those with no constraints.
|
|
|
|
sort-files = \
|
|
|
|
$(eval _tmp_fixed:=) \
|
|
|
|
$(eval _tmp_aligned:=) \
|
|
|
|
$(eval _tmp_regular:=) \
|
|
|
|
$(foreach file,$(1), \
|
|
|
|
$(if $(call extract_nth,5,$(file)),\
|
|
|
|
$(eval _tmp_fixed += $(file)), \
|
|
|
|
$(if $(call extract_nth,6,$(file)), \
|
|
|
|
$(eval _tmp_aligned += $(file)), \
|
|
|
|
$(eval _tmp_regular += $(file))))) \
|
|
|
|
$(_tmp_fixed) $(_tmp_aligned) $(_tmp_regular)
|
|
|
|
|
2016-08-09 20:19:19 +02:00
|
|
|
# command list to add files to CBFS
|
|
|
|
prebuild-files = $(foreach region,$(all-regions), \
|
2016-08-10 13:25:02 +02:00
|
|
|
$(foreach file, \
|
2016-08-10 17:02:58 +02:00
|
|
|
$(call sort-files,$(call placed-files-in-region,$(region))), \
|
2016-08-09 20:19:19 +02:00
|
|
|
$(call cbfs-add-cmd,$(file),$(region),$(CONFIG_UPDATE_IMAGE))))
|
2014-04-23 01:33:22 +02:00
|
|
|
|
2015-09-16 18:10:52 +02:00
|
|
|
ifeq ($(CONFIG_FMDFILE),)
|
|
|
|
# For a description of the flash layout described by these variables, check
|
|
|
|
# the $(DEFAULT_FLASHMAP) .fmd files.
|
|
|
|
ifeq ($(CONFIG_ARCH_X86),y)
|
|
|
|
DEFAULT_FLASHMAP:=$(top)/util/cbfstool/default-x86.fmd
|
|
|
|
# entire flash
|
|
|
|
FMAP_ROM_ADDR := $(call int-subtract, 0x100000000 $(CONFIG_ROM_SIZE))
|
|
|
|
FMAP_ROM_SIZE := $(CONFIG_ROM_SIZE)
|
|
|
|
# entire "BIOS" region (everything directly of concern to the host system)
|
|
|
|
# relative to ROM_BASE
|
|
|
|
FMAP_BIOS_BASE := $(call int-subtract, $(CONFIG_ROM_SIZE) $(CONFIG_CBFS_SIZE))
|
2015-12-27 01:02:41 +01:00
|
|
|
FMAP_BIOS_SIZE := $(shell echo $(CONFIG_CBFS_SIZE) | tr A-F a-f)
|
2015-09-16 18:10:52 +02:00
|
|
|
# position and size of flashmap, relative to BIOS_BASE
|
|
|
|
FMAP_FMAP_BASE := 0
|
2018-01-07 23:12:49 +01:00
|
|
|
FMAP_FMAP_SIZE := 0x200
|
|
|
|
|
|
|
|
#
|
|
|
|
# X86 CONSOLE FMAP region
|
|
|
|
#
|
2017-05-11 16:36:29 +02:00
|
|
|
# position, size and entry line of CONSOLE relative to BIOS_BASE, if enabled
|
|
|
|
ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
|
|
|
FMAP_CONSOLE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
|
|
|
|
FMAP_CONSOLE_SIZE := $(CONFIG_CONSOLE_SPI_FLASH_BUFFER_SIZE)
|
|
|
|
FMAP_CONSOLE_ENTRY := CONSOLE@$(FMAP_CONSOLE_BASE) $(FMAP_CONSOLE_SIZE)
|
|
|
|
else # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
|
|
|
FMAP_CONSOLE_BASE := 0
|
|
|
|
FMAP_CONSOLE_SIZE := 0
|
|
|
|
FMAP_CONSOLE_ENTRY :=
|
|
|
|
endif # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
2018-01-07 23:12:49 +01:00
|
|
|
|
|
|
|
#
|
|
|
|
# X86 RW_MRC_CACHE FMAP region
|
|
|
|
#
|
|
|
|
# position, size and entry line of MRC_CACHE relative to BIOS_BASE, if enabled
|
|
|
|
ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
|
|
|
FMAP_MRC_CACHE_BASE := $(call int-align, $(call int-add, $(FMAP_CONSOLE_BASE) \
|
|
|
|
$(FMAP_CONSOLE_SIZE)), 0x10000)
|
|
|
|
else
|
|
|
|
FMAP_MRC_CACHE_BASE := $(call int-align, $(call int-add, $(FMAP_FMAP_BASE) \
|
|
|
|
$(FMAP_FMAP_SIZE)), 0x10000)
|
|
|
|
endif
|
|
|
|
FMAP_MRC_CACHE_SIZE := $(CONFIG_MRC_SETTINGS_CACHE_SIZE)
|
|
|
|
FMAP_MRC_CACHE_ENTRY := RW_MRC_CACHE@$(FMAP_MRC_CACHE_BASE) $(FMAP_MRC_CACHE_SIZE)
|
|
|
|
else # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
FMAP_MRC_CACHE_BASE := 0
|
|
|
|
FMAP_MRC_CACHE_SIZE := 0
|
|
|
|
FMAP_MRC_CACHE_ENTRY :=
|
|
|
|
endif # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
|
|
|
|
#
|
|
|
|
# X86 COREBOOT default cbfs FMAP region
|
|
|
|
#
|
2015-09-16 18:10:52 +02:00
|
|
|
# position and size of CBFS, relative to BIOS_BASE
|
2018-01-07 23:12:49 +01:00
|
|
|
ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
FMAP_CBFS_BASE := $(call int-add, $(FMAP_MRC_CACHE_BASE) $(FMAP_MRC_CACHE_SIZE))
|
|
|
|
else
|
2017-05-11 16:36:29 +02:00
|
|
|
FMAP_CBFS_BASE := $(call int-add, $(FMAP_CONSOLE_SIZE) $(FMAP_FMAP_SIZE))
|
2018-01-07 23:12:49 +01:00
|
|
|
endif
|
2017-05-11 16:36:29 +02:00
|
|
|
FMAP_CBFS_SIZE := $(call int-subtract, $(FMAP_BIOS_SIZE) $(FMAP_CBFS_BASE))
|
2016-01-20 22:52:08 +01:00
|
|
|
else # ifeq ($(CONFIG_ARCH_X86),y)
|
2015-09-16 18:10:52 +02:00
|
|
|
DEFAULT_FLASHMAP:=$(top)/util/cbfstool/default.fmd
|
|
|
|
# entire flash
|
|
|
|
FMAP_ROM_ADDR := 0
|
|
|
|
FMAP_ROM_SIZE := $(CONFIG_ROM_SIZE)
|
|
|
|
# entire "BIOS" region (everything directly of concern to the host system)
|
|
|
|
# relative to ROM_BASE
|
|
|
|
FMAP_BIOS_BASE := 0
|
|
|
|
FMAP_BIOS_SIZE := $(CONFIG_CBFS_SIZE)
|
|
|
|
# position and size of flashmap, relative to BIOS_BASE
|
|
|
|
FMAP_FMAP_BASE := 0x20000
|
|
|
|
FMAP_FMAP_SIZE := 0x100
|
2018-01-07 23:12:49 +01:00
|
|
|
|
|
|
|
#
|
|
|
|
# NON-X86 CONSOLE FMAP region
|
|
|
|
#
|
2017-05-11 16:36:29 +02:00
|
|
|
# position, size and entry line of CONSOLE relative to BIOS_BASE, if enabled
|
|
|
|
ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
|
|
|
FMAP_CONSOLE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
|
|
|
|
FMAP_CONSOLE_SIZE := $(CONFIG_CONSOLE_SPI_FLASH_BUFFER_SIZE)
|
|
|
|
FMAP_CONSOLE_ENTRY := CONSOLE@$(FMAP_CONSOLE_BASE) $(FMAP_CONSOLE_SIZE)
|
|
|
|
else # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
|
|
|
FMAP_CONSOLE_BASE := 0
|
|
|
|
FMAP_CONSOLE_SIZE := 0
|
|
|
|
FMAP_CONSOLE_ENTRY :=
|
|
|
|
endif # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
2018-01-07 23:12:49 +01:00
|
|
|
|
|
|
|
#
|
|
|
|
# NON-X86 RW_MRC_CACHE FMAP region
|
|
|
|
#
|
|
|
|
# position, size and entry line of MRC_CACHE relative to BIOS_BASE, if enabled
|
|
|
|
ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
|
|
|
|
FMAP_MRC_CACHE_BASE := $(call int-align, $(call int-add, $(FMAP_CONSOLE_BASE) \
|
|
|
|
$(FMAP_CONSOLE_SIZE)), 0x10000)
|
|
|
|
else
|
|
|
|
FMAP_MRC_CACHE_BASE := $(call int-align, $(call int-add, $(FMAP_FMAP_BASE) \
|
|
|
|
$(FMAP_FMAP_SIZE)), 0x10000)
|
|
|
|
endif
|
|
|
|
FMAP_MRC_CACHE_SIZE := $(CONFIG_MRC_SETTINGS_CACHE_SIZE)
|
|
|
|
FMAP_MRC_CACHE_ENTRY := RW_MRC_CACHE@$(FMAP_MRC_CACHE_BASE) $(FMAP_MRC_CACHE_SIZE)
|
|
|
|
else # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
FMAP_MRC_CACHE_BASE := 0
|
|
|
|
FMAP_MRC_CACHE_SIZE := 0
|
|
|
|
FMAP_MRC_CACHE_ENTRY :=
|
|
|
|
endif # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
|
|
|
|
|
|
|
|
#
|
|
|
|
# NON-X86 COREBOOT default cbfs FMAP region
|
|
|
|
#
|
2015-09-16 18:10:52 +02:00
|
|
|
# position and size of CBFS, relative to BIOS_BASE
|
2018-01-07 23:12:49 +01:00
|
|
|
FMAP_CBFS_BASE := $(call int-add,$(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE) $(FMAP_CONSOLE_SIZE) \
|
|
|
|
$(FMAP_MRC_CACHE_SIZE))
|
2015-09-16 18:10:52 +02:00
|
|
|
FMAP_CBFS_SIZE := $(call int-subtract,$(FMAP_BIOS_SIZE) $(FMAP_CBFS_BASE))
|
2016-01-20 22:52:08 +01:00
|
|
|
endif # ifeq ($(CONFIG_ARCH_X86),y)
|
2015-09-16 18:10:52 +02:00
|
|
|
|
2015-12-27 01:02:41 +01:00
|
|
|
$(obj)/fmap.fmd: $(top)/Makefile.inc $(DEFAULT_FLASHMAP) $(obj)/config.h
|
2015-09-16 18:10:52 +02:00
|
|
|
sed -e "s,##ROM_BASE##,$(FMAP_ROM_ADDR)," \
|
|
|
|
-e "s,##ROM_SIZE##,$(FMAP_ROM_SIZE)," \
|
|
|
|
-e "s,##BIOS_BASE##,$(FMAP_BIOS_BASE)," \
|
|
|
|
-e "s,##BIOS_SIZE##,$(FMAP_BIOS_SIZE)," \
|
|
|
|
-e "s,##FMAP_BASE##,$(FMAP_FMAP_BASE)," \
|
|
|
|
-e "s,##FMAP_SIZE##,$(FMAP_FMAP_SIZE)," \
|
2017-05-11 16:36:29 +02:00
|
|
|
-e "s,##CONSOLE_ENTRY##,$(FMAP_CONSOLE_ENTRY)," \
|
2018-01-07 23:12:49 +01:00
|
|
|
-e "s,##MRC_CACHE_ENTRY##,$(FMAP_MRC_CACHE_ENTRY)," \
|
2015-09-16 18:10:52 +02:00
|
|
|
-e "s,##CBFS_BASE##,$(FMAP_CBFS_BASE)," \
|
|
|
|
-e "s,##CBFS_SIZE##,$(FMAP_CBFS_SIZE)," \
|
|
|
|
$(DEFAULT_FLASHMAP) > $@.tmp
|
|
|
|
mv $@.tmp $@
|
2016-01-20 22:52:08 +01:00
|
|
|
else # ifeq ($(CONFIG_FMDFILE),)
|
2015-12-27 01:02:41 +01:00
|
|
|
$(obj)/fmap.fmd: $(CONFIG_FMDFILE) $(obj)/config.h
|
2016-06-17 01:48:44 +02:00
|
|
|
$(HOSTCC) $(PREPROCESS_ONLY) -include $(obj)/config.h $< -o $@.pre
|
|
|
|
mv $@.pre $@
|
2016-01-20 22:52:08 +01:00
|
|
|
endif # ifeq ($(CONFIG_FMDFILE),)
|
2015-09-16 18:10:52 +02:00
|
|
|
|
|
|
|
# generated at the same time as fmap.fmap
|
2016-05-02 10:50:31 +02:00
|
|
|
$(obj)/fmap_config.h: $(obj)/fmap.fmap
|
2016-01-20 15:32:03 +01:00
|
|
|
$(obj)/fmap.desc: $(obj)/fmap.fmap
|
2015-09-16 18:10:52 +02:00
|
|
|
|
|
|
|
$(obj)/fmap.fmap: $(obj)/fmap.fmd $(FMAPTOOL)
|
2016-05-02 10:50:31 +02:00
|
|
|
echo " FMAP $(FMAPTOOL) -h $(obj)/fmap_config.h $< $@"
|
|
|
|
$(FMAPTOOL) -h $(obj)/fmap_config.h -R $(obj)/fmap.desc $< $@
|
2015-09-16 18:10:52 +02:00
|
|
|
|
2016-05-04 01:37:50 +02:00
|
|
|
ifneq ($(CONFIG_UPDATE_IMAGE),y)
|
2016-01-20 15:32:03 +01:00
|
|
|
$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap $(obj)/fmap.desc
|
|
|
|
$(CBFSTOOL) $@.tmp create -M $(obj)/fmap.fmap -r $(shell cat $(obj)/fmap.desc)
|
2015-09-16 18:10:52 +02:00
|
|
|
ifeq ($(CONFIG_ARCH_X86),y)
|
|
|
|
$(CBFSTOOL) $@.tmp add \
|
|
|
|
-f $(objcbfs)/bootblock.bin \
|
|
|
|
-n bootblock \
|
|
|
|
-t bootblock \
|
2016-01-14 15:08:36 +01:00
|
|
|
-b -$(call file-size,$(objcbfs)/bootblock.bin) $(cbfs-autogen-attributes)
|
2016-01-20 22:52:08 +01:00
|
|
|
else # ifeq ($(CONFIG_ARCH_X86),y)
|
2015-09-16 18:10:52 +02:00
|
|
|
$(CBFSTOOL) $@.tmp write -u \
|
|
|
|
-r BOOTBLOCK \
|
|
|
|
-f $(objcbfs)/bootblock.bin
|
|
|
|
# make space for the CBFS master header pointer. "ptr_" is just
|
|
|
|
# arbitrary 4 bytes that will be overwritten by add-master-header.
|
|
|
|
printf "ptr_" > $@.tmp.2
|
|
|
|
$(CBFSTOOL) $@.tmp add \
|
|
|
|
-f $@.tmp.2 \
|
|
|
|
-n "header pointer" \
|
|
|
|
-t "cbfs header" \
|
|
|
|
-b -4
|
|
|
|
rm -f $@.tmp.2
|
2016-01-20 22:52:08 +01:00
|
|
|
endif # ifeq ($(CONFIG_ARCH_X86),y)
|
2015-09-16 18:10:52 +02:00
|
|
|
$(CBFSTOOL) $@.tmp add-master-header
|
2014-04-23 01:33:22 +02:00
|
|
|
$(prebuild-files) true
|
|
|
|
mv $@.tmp $@
|
2016-01-20 22:52:08 +01:00
|
|
|
else # ifneq ($(CONFIG_UPDATE_IMAGE),y)
|
2015-11-26 17:22:38 +01:00
|
|
|
.PHONY: $(obj)/coreboot.pre
|
|
|
|
$(obj)/coreboot.pre: $$(prebuilt-files) $(CBFSTOOL)
|
2016-01-20 22:54:27 +01:00
|
|
|
mv $(obj)/coreboot.rom $@.tmp || \
|
|
|
|
(echo "Error: You have UPDATE_IMAGE set in Kconfig, but have no existing image to update." && \
|
2016-01-26 22:25:40 +01:00
|
|
|
echo "Exiting." && \
|
2016-01-20 22:54:27 +01:00
|
|
|
false)
|
2015-06-03 18:54:59 +02:00
|
|
|
$(prebuild-files) true
|
|
|
|
mv $@.tmp $@
|
2016-01-20 22:52:08 +01:00
|
|
|
endif # ifneq ($(CONFIG_UPDATE_IMAGE),y)
|
2014-04-23 01:33:22 +02:00
|
|
|
|
|
|
|
ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
|
|
|
|
REFCODE_BLOB=$(obj)/refcode.rmod
|
|
|
|
$(REFCODE_BLOB): $(RMODTOOL)
|
|
|
|
$(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@
|
|
|
|
endif
|
|
|
|
|
2015-12-04 17:45:19 +01:00
|
|
|
$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $$(INTERMEDIATE)
|
2014-04-23 01:33:22 +02:00
|
|
|
@printf " CBFS $(subst $(obj)/,,$(@))\n"
|
CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool
Some projects (like ChromeOS) put more content than described by CBFS
onto their image. For top-aligned images (read: x86), this has
traditionally been achieved with a CBFS_SIZE Kconfig (which denotes the
area actually managed by CBFS, as opposed to ROM_SIZE) that is used to
calculate the CBFS entry start offset. On bottom-aligned boards, many
define a fake (smaller) ROM_SIZE for only the CBFS part, which is not
consistently done and can be an issue because ROM_SIZE is expected to be
a power of two.
This patch changes all non-x86 boards to describe their actual
(physical) ROM size via one of the BOARD_ROMSIZE_KB_xxx options as a
mainboard Kconfig select (which is the correct place to declare
unchangeable physical properties of the board). It also changes the
cbfstool create invocation to use CBFS_SIZE as the -s parameter for
those architectures, which defaults to ROM_SIZE but gets overridden for
special use cases like ChromeOS. This has the advantage that cbfstool
has a consistent idea of where the area it is responsible for ends,
which offers better bounds-checking and is needed for a subsequent fix.
Also change the FMAP offset to default to right behind the (now
consistently known) CBFS region for non-x86 boards, which has emerged as
a de-facto standard on those architectures and allows us to reduce the
amount of custom configuration. In the future, the nightmare that is
ChromeOS's image build system could be redesigned to enforce this
automatically, and also confirm that it doesn't overwrite any space used
by CBFS (which is now consistently defined as the file size of
coreboot.rom on non-x86).
CQ-DEPEND=CL:231576,CL:231475
BRANCH=None
BUG=chromium:422501
TEST=Built and booted on Veyron_Pinky.
Change-Id: I89aa5b30e25679e074d4cb5eee4c08178892ada6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e707c67c69599274b890d0686522880aa2e16d71
Original-Change-Id: I4fce5a56a8d72f4c4dd3a08c129025f1565351cc
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229974
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9619
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-11-10 22:11:50 +01:00
|
|
|
# The full ROM may be larger than the CBFS part, so create an empty
|
|
|
|
# file (filled with \377 = 0xff) and copy the CBFS image over it.
|
2015-04-22 09:22:00 +02:00
|
|
|
dd if=/dev/zero bs=$(call _toint,$(CONFIG_ROM_SIZE)) count=1 2> /dev/null | tr '\000' '\377' > $@.tmp
|
CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool
Some projects (like ChromeOS) put more content than described by CBFS
onto their image. For top-aligned images (read: x86), this has
traditionally been achieved with a CBFS_SIZE Kconfig (which denotes the
area actually managed by CBFS, as opposed to ROM_SIZE) that is used to
calculate the CBFS entry start offset. On bottom-aligned boards, many
define a fake (smaller) ROM_SIZE for only the CBFS part, which is not
consistently done and can be an issue because ROM_SIZE is expected to be
a power of two.
This patch changes all non-x86 boards to describe their actual
(physical) ROM size via one of the BOARD_ROMSIZE_KB_xxx options as a
mainboard Kconfig select (which is the correct place to declare
unchangeable physical properties of the board). It also changes the
cbfstool create invocation to use CBFS_SIZE as the -s parameter for
those architectures, which defaults to ROM_SIZE but gets overridden for
special use cases like ChromeOS. This has the advantage that cbfstool
has a consistent idea of where the area it is responsible for ends,
which offers better bounds-checking and is needed for a subsequent fix.
Also change the FMAP offset to default to right behind the (now
consistently known) CBFS region for non-x86 boards, which has emerged as
a de-facto standard on those architectures and allows us to reduce the
amount of custom configuration. In the future, the nightmare that is
ChromeOS's image build system could be redesigned to enforce this
automatically, and also confirm that it doesn't overwrite any space used
by CBFS (which is now consistently defined as the file size of
coreboot.rom on non-x86).
CQ-DEPEND=CL:231576,CL:231475
BRANCH=None
BUG=chromium:422501
TEST=Built and booted on Veyron_Pinky.
Change-Id: I89aa5b30e25679e074d4cb5eee4c08178892ada6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e707c67c69599274b890d0686522880aa2e16d71
Original-Change-Id: I4fce5a56a8d72f4c4dd3a08c129025f1565351cc
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229974
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9619
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-11-10 22:11:50 +01:00
|
|
|
dd if=$(obj)/coreboot.pre of=$@.tmp bs=8192 conv=notrunc 2> /dev/null
|
2014-04-23 01:33:22 +02:00
|
|
|
ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
|
|
|
|
ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
|
2017-01-25 15:21:08 +01:00
|
|
|
ifneq ($(CONFIG_UPDATE_IMAGE),y)
|
2014-04-23 01:33:22 +02:00
|
|
|
@printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
|
|
|
|
$(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
|
|
|
|
endif
|
|
|
|
endif
|
2017-01-25 15:21:08 +01:00
|
|
|
endif
|
2014-04-23 01:33:22 +02:00
|
|
|
ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
|
2016-07-20 13:27:43 +02:00
|
|
|
ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
|
|
|
|
@printf " UPDATE-FIT\n"
|
|
|
|
$(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES)
|
|
|
|
endif
|
|
|
|
|
2015-10-14 22:41:49 +02:00
|
|
|
ifeq ($(CONFIG_CPU_MICROCODE_CBFS_GENERATE),y)
|
2016-07-20 13:27:43 +02:00
|
|
|
@printf " UPDATE-FIT\n"
|
2014-04-23 01:33:22 +02:00
|
|
|
$(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES)
|
|
|
|
endif
|
|
|
|
endif
|
|
|
|
mv $@.tmp $@
|
|
|
|
@printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
|
2016-08-10 17:13:00 +02:00
|
|
|
$(CBFSTOOL) $@ print -r $(subst $(spc),$(comma),$(all-regions))
|
2014-04-23 01:33:22 +02:00
|
|
|
|
2015-11-26 16:39:23 +01:00
|
|
|
cbfs-files-y += $(CONFIG_CBFS_PREFIX)/romstage
|
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-file := $(objcbfs)/romstage.elf
|
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-type := stage
|
2015-09-29 22:51:35 +02:00
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
|
2015-11-26 16:39:23 +01:00
|
|
|
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y)
|
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-options := -b 0
|
|
|
|
endif
|
|
|
|
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
|
|
|
|
# Use a 64 byte alignment to provide a minimum alignment
|
|
|
|
# requirement for the overall romstage. While the first object within
|
|
|
|
# romstage could have a 4 byte minimum alignment that doesn't mean the linker
|
|
|
|
# won't decide the entire section should be aligned to a larger value. In the
|
|
|
|
# future cbfstool should add XIP files proper and honor the alignment
|
|
|
|
# requirements of the program segment.
|
|
|
|
#
|
|
|
|
# Make sure that segment for .car.data is ignored while adding romstage.
|
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-align := 64
|
2016-05-05 08:25:16 +02:00
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-options := -S ".car.data"
|
|
|
|
|
|
|
|
# If CAR does not support execution of code, romstage on x86 is expected to be
|
|
|
|
# xip.
|
|
|
|
ifneq ($(CONFIG_NO_XIP_EARLY_STAGES),y)
|
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-options += --xip
|
|
|
|
|
2016-05-05 17:34:22 +02:00
|
|
|
# If XIP_ROM_SIZE isn't being used don't overly constrain romstage by passing
|
|
|
|
# -P with a default value.
|
|
|
|
ifneq ($(CONFIG_NO_FIXED_XIP_ROM_SIZE),y)
|
|
|
|
$(CONFIG_CBFS_PREFIX)/romstage-options += -P $(CONFIG_XIP_ROM_SIZE)
|
2016-05-05 08:25:16 +02:00
|
|
|
endif # CONFIG_NO_FIXED_XIP_ROM_SIZE
|
|
|
|
|
|
|
|
endif # CONFIG_NO_XIP_EARLY_STAGES
|
|
|
|
endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
|
2015-11-26 16:39:23 +01:00
|
|
|
|
2015-11-25 18:21:53 +01:00
|
|
|
cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage
|
|
|
|
$(CONFIG_CBFS_PREFIX)/ramstage-file := $(objcbfs)/ramstage.elf
|
|
|
|
$(CONFIG_CBFS_PREFIX)/ramstage-type := stage
|
|
|
|
$(CONFIG_CBFS_PREFIX)/ramstage-compression := $(CBFS_COMPRESS_FLAG)
|
|
|
|
|
|
|
|
cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
|
|
|
|
$(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
|
|
|
|
$(CONFIG_CBFS_PREFIX)/refcode-type := stage
|
|
|
|
$(CONFIG_CBFS_PREFIX)/refcode-compression := $(CBFS_COMPRESS_FLAG)
|
|
|
|
|
|
|
|
cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin
|
|
|
|
vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE)
|
|
|
|
vgaroms/seavgabios.bin-type := raw
|
|
|
|
|
2015-11-25 18:47:56 +01:00
|
|
|
cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += config
|
|
|
|
config-file := $(DOTCONFIG):defconfig
|
|
|
|
config-type := raw
|
|
|
|
|
|
|
|
cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += revision
|
|
|
|
revision-file := $(obj)/build.h
|
|
|
|
revision-type := raw
|
|
|
|
|
2016-05-21 04:20:58 +02:00
|
|
|
BOOTSPLASH_SUFFIX=$(suffix $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)))
|
|
|
|
cbfs-files-$(CONFIG_BOOTSPLASH_IMAGE) += bootsplash$(BOOTSPLASH_SUFFIX)
|
|
|
|
bootsplash$(BOOTSPLASH_SUFFIX)-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
|
|
|
|
bootsplash$(BOOTSPLASH_SUFFIX)-type := bootsplash
|
2014-04-23 01:33:22 +02:00
|
|
|
|
2016-03-08 02:55:43 +01:00
|
|
|
# Ensure that no payload segment overlaps with memory regions used by ramstage
|
|
|
|
# (not for x86 since it can relocate itself in that case)
|
|
|
|
ifneq ($(CONFIG_ARCH_X86),y)
|
|
|
|
check-ramstage-overlap-regions := ramstage
|
|
|
|
check-ramstage-overlap-files :=
|
|
|
|
ifneq ($(CONFIG_PAYLOAD_NONE),y)
|
|
|
|
check-ramstage-overlap-files += $(CONFIG_CBFS_PREFIX)/payload
|
|
|
|
endif
|
|
|
|
|
|
|
|
# will output one or more lines of "<load address in hex> <memlen in decimal>"
|
|
|
|
cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \
|
|
|
|
'\%$(1)%,\%^[^ ]\{4\}%s% .*load: \(0x[0-9a-fA-F]*\),.*length: [0-9]*/\([0-9]*\).*%\1 \2%p'
|
|
|
|
|
|
|
|
ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \
|
|
|
|
sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p'
|
|
|
|
|
|
|
|
check-ramstage-overlaps: $(obj)/coreboot.pre
|
|
|
|
programs=$$($(foreach file,$(check-ramstage-overlap-files), \
|
|
|
|
$(call cbfs-get-segments-cmd,$(file)) ; )) ; \
|
|
|
|
regions=$$($(foreach region,$(check-ramstage-overlap-regions), \
|
|
|
|
echo $(region) ; \
|
|
|
|
$(call ramstage-symbol-addr-cmd,_$(region)) ; \
|
|
|
|
$(call ramstage-symbol-addr-cmd,_e$(region)) ; )) ; \
|
|
|
|
pstart= ; pend= ; \
|
|
|
|
for x in $$programs; do \
|
|
|
|
if [ -z $$pstart ]; then pstart=$$(($$x)) ; continue ; fi ; \
|
|
|
|
pend=$$(($$pstart + $$x)) ; \
|
|
|
|
rname= ; rstart= ; rend= ; \
|
|
|
|
for y in $$regions ; do \
|
|
|
|
if [ -z $$rname ]; then rname=$$y ; continue ; fi ; \
|
|
|
|
if [ -z $$rstart ]; then rstart=$$(($$y)) ; continue ; fi ; \
|
|
|
|
rend=$$(($$y)) ; \
|
|
|
|
if [ $$pstart -lt $$rend -a $$rstart -lt $$pend ]; then \
|
|
|
|
echo "ERROR: Ramstage region _$$rname overlapped by:" \
|
|
|
|
$(check-ramstage-overlap-files) ; \
|
|
|
|
exit 1 ; \
|
|
|
|
fi ; \
|
|
|
|
rname= ; rstart= ; rend= ; \
|
|
|
|
done ; \
|
|
|
|
pstart= ; pend= ; \
|
|
|
|
done
|
|
|
|
|
|
|
|
INTERMEDIATE+=check-ramstage-overlaps
|
|
|
|
PHONY+=check-ramstage-overlaps
|
|
|
|
endif
|