superio/fintek/f71808a: Add more optional ramstage registers
Add more registers and make them optional, so they keep untouched/ their default if omitted. Change-Id: I5d8008176d2972976b387c558658b8e70b50af8e Signed-off-by: Max Blau <tripleshiftone@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -22,6 +22,13 @@
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struct superio_fintek_f71808a_config {
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uint8_t hwm_vt1_boundary_1_temperature;
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uint8_t hwm_vt1_boundary_2_temperature;
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uint8_t hwm_vt1_boundary_3_temperature;
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uint8_t hwm_vt1_boundary_4_temperature;
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uint8_t hwm_fan1_boundary_hysteresis;
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uint8_t hwm_domain1_en;
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/* Multi function registers */
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uint8_t multi_function_register_0;
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uint8_t multi_function_register_1;
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@ -23,6 +23,7 @@
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/* Intel Ibex Peak/PECI/AMD TSI */
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#define HWM_PECI_TSI_CTRL_REG 0x0a
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#define HWM_DOMAIN1_EN 0x0b
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#define HWM_TCC_TEMPERATURE_REG 0x0c
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/* Fan 1 control */
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@ -33,6 +34,12 @@
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#define HWM_FAN1_SEG5_SPEED_REG 0xae
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#define HWM_FAN1_TEMP_SRC_REG 0xaf
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#define HWM_FAN1_BOUNDARY_HYSTERESIS 0x98
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#define HWM_VT1_BOUNDARY_1_TEMPERATURE 0xa6
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#define HWM_VT1_BOUNDARY_2_TEMPERATURE 0xa7
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#define HWM_VT1_BOUNDARY_3_TEMPERATURE 0xa8
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#define HWM_VT1_BOUNDARY_4_TEMPERATURE 0xa9
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/* Fan 2 control */
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#define HWM_FAN2_SEG1_SPEED_REG 0xba
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#define HWM_FAN2_SEG2_SPEED_REG 0xbb
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@ -55,6 +62,21 @@ void f71808a_hwm_init(struct device *dev)
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pnp_enter_conf_mode(dev);
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if (reg->hwm_vt1_boundary_1_temperature) {
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pnp_write_index(port, HWM_VT1_BOUNDARY_4_TEMPERATURE,
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reg->hwm_vt1_boundary_4_temperature);
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pnp_write_index(port, HWM_VT1_BOUNDARY_3_TEMPERATURE,
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reg->hwm_vt1_boundary_3_temperature);
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pnp_write_index(port, HWM_VT1_BOUNDARY_2_TEMPERATURE,
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reg->hwm_vt1_boundary_2_temperature);
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pnp_write_index(port, HWM_VT1_BOUNDARY_1_TEMPERATURE,
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reg->hwm_vt1_boundary_1_temperature);
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pnp_write_index(port, HWM_FAN1_BOUNDARY_HYSTERESIS,
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reg->hwm_fan1_boundary_hysteresis);
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pnp_write_index(port, HWM_DOMAIN1_EN,
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reg->hwm_domain1_en);
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}
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pnp_write_index(port, HWM_PECI_TSI_CTRL_REG, reg->hwm_peci_tsi_ctrl);
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pnp_write_index(port, HWM_TCC_TEMPERATURE_REG, reg->hwm_tcc_temp);
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