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cpu/Kconfig: Remove MMX config option 

Now -mno-mmx is statically set in arch/x86 so remove this option.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I0da7f9f1afb0c8ecae728c45591897ca1d4dfb11
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2023-05-17 23:10:32 +02:00 committed by Felix Held
parent 67d9518586
commit 1a903f9878
11 changed files with 0 additions and 19 deletions
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4
Makefile
View File

@ -190,10 +190,6 @@ endif
# are reproducible
export LANG LC_ALL TZ SOURCE_DATE_EPOCH
ifneq ($(CONFIG_MMX),y)
CFLAGS_x86_32 += -mno-mmx
endif
ifneq ($(UNIT_TEST),1)
include toolchain.inc
endif

6
src/cpu/Kconfig
View File

@ -27,12 +27,6 @@ config SMP
This option is used to enable certain functions to make coreboot
work correctly on symmetric multi processor (SMP) systems.
config MMX
bool
help
Select MMX in your socket or model Kconfig if your CPU has MMX
streaming SIMD instructions.
config SSE
bool
help

1
src/cpu/intel/haswell/Kconfig
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@ -7,7 +7,6 @@ if CPU_INTEL_HASWELL
config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select MMX
select SSE2
select UDELAY_TSC
select TSC_MONOTONIC_TIMER

1
src/cpu/intel/model_206ax/Kconfig
View File

@ -7,7 +7,6 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_X86
select HAVE_EXP_X86_64_SUPPORT if USE_NATIVE_RAMINIT
select MMX
select SSE2
select UDELAY_TSC
select TSC_MONOTONIC_TIMER

1
src/cpu/intel/socket_441/Kconfig
View File

@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_441
config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_106CX
select MMX
select SETUP_XIP_CACHE
config DCACHE_RAM_BASE

1
src/cpu/intel/socket_BGA956/Kconfig
View File

@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_BGA956
config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_1067X
select MMX
config DCACHE_RAM_BASE
hex

1
src/cpu/intel/socket_FCBGA559/Kconfig
View File

@ -8,7 +8,6 @@ if CPU_INTEL_SOCKET_FCBGA559
config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_106CX
select MMX
select CPU_HAS_L2_ENABLE_MSR
config DCACHE_RAM_BASE

1
src/cpu/intel/socket_LGA775/Kconfig
View File

@ -9,7 +9,6 @@ config SOCKET_SPECIFIC_OPTIONS
select CPU_INTEL_MODEL_F3X
select CPU_INTEL_MODEL_F4X
select CPU_INTEL_MODEL_1067X
select MMX
select SIPI_VECTOR_IN_ROM
config DCACHE_RAM_SIZE

1
src/cpu/intel/socket_m/Kconfig
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@ -7,7 +7,6 @@ config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_6EX
select CPU_INTEL_MODEL_6FX
select MMX
config DCACHE_RAM_BASE
hex

1
src/cpu/intel/socket_mPGA604/Kconfig
View File

@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_MPGA604
config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_F2X
select MMX
select UDELAY_TSC
select TSC_MONOTONIC_TIMER
select SIPI_VECTOR_IN_ROM

1
src/cpu/intel/socket_p/Kconfig
View File

@ -7,7 +7,6 @@ config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_1067X
select CPU_INTEL_MODEL_6FX
select MMX
config DCACHE_RAM_BASE
hex