mb/google/volteer/var/halvor: Update TBT2 setting for Halvor
Enable TBT2 setting in overridetree.cb based on schematic. BUG=b:165175296, b:166060548 BRANCH=none TEST=Check all USB ports USB2 and USB3 both functional Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Change-Id: I23ecf76a3c2f631211b0ae2898707c68862b374b Reviewed-on: https://review.coreboot.org/c/coreboot/+/44747 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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@ -19,6 +19,7 @@ chip soc/intel/tigerlake
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device domain 0 on
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device pci 07.2 on end # TBT_PCIe2
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device pci 0d.3 on end # TBT DMA1 0x9A1D
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device pci 15.0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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