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mb/google/volteer/var/halvor: Update TBT2 setting for Halvor 

Enable TBT2 setting in overridetree.cb based on schematic.

BUG=b:165175296, b:166060548
BRANCH=none
TEST=Check all USB ports USB2 and USB3 both functional

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I23ecf76a3c2f631211b0ae2898707c68862b374b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44747
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
This commit is contained in:
Frank Wu 2020-08-25 12:43:07 +08:00 committed by Patrick Georgi
parent 1bea841b2f
commit 285cbb38f7
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/volteer/variants/halvor/overridetree.cb
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@ -19,6 +19,7 @@ chip soc/intel/tigerlake
device domain 0 on device domain 0 on
device pci 07.2 on end # TBT_PCIe2 device pci 07.2 on end # TBT_PCIe2
device pci 0d.3 on end # TBT DMA1 0x9A1D
device pci 15.0 on device pci 15.0 on
chip drivers/i2c/generic chip drivers/i2c/generic
register "hid" = ""10EC5682"" register "hid" = ""10EC5682""