soc/intel/common/cpu: Use SoC overrides to set CPU privilege level

This patch implements a SoC overrides to set CPU privilege level
as the MSR is not consistent across platforms. For example:
On APL/GLK/DNV, it's MSR 0x120 and CNL onwards it's MSR 0x151.

BUG=b:233199592
TEST=Build and boot google/taeko to ChromeOS.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I4584516102560e6bb2a4ae8c0d036be40ed96990
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>

src/soc/intel/alderlake/cpu.c

@@ -38,6 +38,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void soc_fsp_load(void)
 {
 	fsps_load();

src/soc/intel/apollolake/cpu.c

@@ -54,6 +54,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_POWER_MISC);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_POWER_MISC, msr);
+}
+
 void soc_core_init(struct device *cpu)
 {
 	/* Configure Core PRMRR for SGX. */

src/soc/intel/cannonlake/cpu.c

@@ -27,6 +27,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void soc_fsp_load(void)
 {
 	fsps_load();

src/soc/intel/common/block/include/intelblocks/cpulib.h

@@ -120,6 +120,9 @@ void cpu_set_eist(bool eist_status);
  */
 bool cpu_soc_is_in_untrusted_mode(void);
 
+/* SoC function to set the BIOS DONE MSR. */
+void cpu_soc_bios_done(void);
+
 /*
  * This function fills in the number of Cores(physical) and Threads(virtual)
  * of the CPU in the function arguments. It also returns if the number of cores

src/soc/intel/denverton_ns/cpu.c

@@ -31,6 +31,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_POWER_MISC);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_POWER_MISC, msr);
+}
+
 static struct smm_relocation_attrs relo_attrs;
 
 static void dnv_configure_mca(void)

src/soc/intel/elkhartlake/cpu.c

@@ -24,6 +24,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void soc_fsp_load(void)
 {
 	fsps_load();

src/soc/intel/icelake/cpu.c

@@ -24,6 +24,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void soc_fsp_load(void)
 {
 	fsps_load();

src/soc/intel/jasperlake/cpu.c

@@ -24,6 +24,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void soc_fsp_load(void)
 {
 	fsps_load();

src/soc/intel/skylake/cpu.c

@@ -27,6 +27,10 @@
 
 bool cpu_soc_is_in_untrusted_mode(void)
 {
+	/*
+	 * TODO: Add dynamic detection to identify if skylake SoC
+	 * is in coffeelake board.
+	 */
 	if (!CONFIG(MAINBOARD_SUPPORTS_COFFEELAKE_CPU))
 		return false;
 
@@ -35,6 +39,18 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	if (!CONFIG(MAINBOARD_SUPPORTS_COFFEELAKE_CPU))
+		return;
+
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void configure_misc(void)
 {
 	config_t *conf = config_of_soc();

src/soc/intel/tigerlake/cpu.c

@@ -30,6 +30,15 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return !!(msr.lo & ENABLE_IA_UNTRUSTED);
 }
 
+void cpu_soc_bios_done(void)
+{
+	msr_t msr;
+
+	msr = rdmsr(MSR_BIOS_DONE);
+	msr.lo |= ENABLE_IA_UNTRUSTED;
+	wrmsr(MSR_BIOS_DONE, msr);
+}
+
 static void soc_fsp_load(void)
 {
 	fsps_load();

src/soc/intel/xeon_sp/cpx/cpu.c

@@ -36,6 +36,11 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return false;
 }
 
+void cpu_soc_bios_done(void)
+{
+	/* IA_UNTRUSTED_MODE is not supported in Cooper Lake */
+}
+
 static void xeon_configure_mca(void)
 {
 	msr_t msr;

src/soc/intel/xeon_sp/skx/cpu.c

@@ -26,6 +26,11 @@ bool cpu_soc_is_in_untrusted_mode(void)
 	return false;
 }
 
+void cpu_soc_bios_done(void)
+{
+	/* IA_UNTRUSTED_MODE is not supported in Skylake */
+}
+
 static void xeon_configure_mca(void)
 {
 	msr_t msr;