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include/console: Fix duplicate entry of postcode 0x79 

Change POST_PRE_HARDWAREMAIN postcode value from 0x79 to 0x6e to
avoid duplicate entry.

Change-Id: I50cc75cd3097fba3e7faff05188511bba69ef1e7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Subrata Banik 2021-05-05 19:34:07 +05:30
parent 01ecb77ef6
commit 38e4a2d4cf
2 changed files with 8 additions and 8 deletions
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2
src/arch/x86/c_start.S
View File

@ -89,7 +89,7 @@ _start:
* bss is cleared. Now we call the main routine and
* let it do the rest.
*/
post_code(POST_PRE_HARDWAREMAIN) /* post fe */
post_code(POST_PRE_HARDWAREMAIN) /* post 6e */
andl $0xFFFFFFF0, %esp

14
src/include/console/post_codes.h
View File

@ -104,6 +104,13 @@
*/
#define POST_ENABLING_CACHE 0x60
/**
* \brief Pre call to RAM stage main()
*
* POSTed right before RAM stage main() is called from c_start.S
*/
#define POST_PRE_HARDWAREMAIN 0x6e
/**
* \brief Before Device Probe
*
@ -174,13 +181,6 @@
*/
#define POST_BS_WRITE_TABLES 0x79
/**
* \brief Pre call to RAM stage main()
*
* POSTed right before RAM stage main() is called from c_start.S
*/
#define POST_PRE_HARDWAREMAIN 0x79
/**
* \brief Load Payload
*