soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c

Commit 2c26108208 moved this function to
pmutil.c for Tiger Lake. Do this to all other platforms for consistency.
For Skylake, __SIMPLE_DEVICE__ preprocessor guards are no longer needed.

With this change, pmc.c is only needed in ramstage. Adjust Makefile.inc
accordingly, and drop ENV_RAMSTAGE guards from Skylake.

Change-Id: I424eb359c898f155659d085b888410b6bb58b9ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

src/soc/intel/apollolake/Makefile.inc

@@ -42,7 +42,6 @@ romstage-y += reset.c
 romstage-y += spi.c
 
 smm-y += mmap_boot.c
-smm-y += pmc.c
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += spi.c

src/soc/intel/apollolake/pmc.c

@@ -77,19 +77,6 @@ static void set_slp_s3_assertion_width(int width_usecs)
 	write32((void *)gen_pmcon3, reg);
 }
 
-void pmc_soc_set_afterg3_en(const bool on)
-{
-	void *const gen_pmcon1 = (void *)(soc_read_pmc_base() + GEN_PMCON1);
-	uint32_t reg32;
-
-	reg32 = read32(gen_pmcon1);
-	if (on)
-		reg32 &= ~SLEEP_AFTER_POWER_FAIL;
-	else
-		reg32 |= SLEEP_AFTER_POWER_FAIL;
-	write32(gen_pmcon1, reg32);
-}
-
 void pmc_soc_init(struct device *dev)
 {
 	const struct soc_intel_apollolake_config *cfg = config_of(dev);

src/soc/intel/apollolake/pmutil.c

@@ -224,3 +224,16 @@ uint16_t get_pmbase(void)
 {
 	return (uint16_t) ACPI_BASE_ADDRESS;
 }
+
+void pmc_soc_set_afterg3_en(const bool on)
+{
+	void *const gen_pmcon1 = (void *)(soc_read_pmc_base() + GEN_PMCON1);
+	uint32_t reg32;
+
+	reg32 = read32(gen_pmcon1);
+	if (on)
+		reg32 &= ~SLEEP_AFTER_POWER_FAIL;
+	else
+		reg32 |= SLEEP_AFTER_POWER_FAIL;
+	write32(gen_pmcon1, reg32);
+}

src/soc/intel/cannonlake/Makefile.inc

@@ -56,7 +56,6 @@ ramstage-y += xhci.c
 
 smm-y += elog.c
 smm-y += p2sb.c
-smm-y += pmc.c
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += uart.c

src/soc/intel/cannonlake/pmc.c

@@ -12,23 +12,6 @@
 
 #include "chip.h"
 
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
-	uint8_t reg8;
-	uint8_t *const pmcbase = pmc_mmio_regs();
-
-	reg8 = read8(pmcbase + GEN_PMCON_A);
-	if (on)
-		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
-	else
-		reg8 |= SLEEP_AFTER_POWER_FAIL;
-	write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
 static void pm1_enable_pwrbtn_smi(void *unused)
 {
 	/*

src/soc/intel/cannonlake/pmutil.c

@@ -259,3 +259,20 @@ uint16_t get_pmbase(void)
 {
 	return (uint16_t) ACPI_BASE_ADDRESS;
 }
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+	uint8_t reg8;
+	uint8_t *const pmcbase = pmc_mmio_regs();
+
+	reg8 = read8(pmcbase + GEN_PMCON_A);
+	if (on)
+		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+	else
+		reg8 |= SLEEP_AFTER_POWER_FAIL;
+	write8(pmcbase + GEN_PMCON_A, reg8);
+}

src/soc/intel/elkhartlake/Makefile.inc

@@ -45,7 +45,6 @@ ramstage-y += me.c
 
 smm-y += gpio.c
 smm-y += p2sb.c
-smm-y += pmc.c
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += uart.c

src/soc/intel/elkhartlake/pmc.c

@@ -11,23 +11,6 @@
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
 
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
-	uint8_t reg8;
-	uint8_t *const pmcbase = pmc_mmio_regs();
-
-	reg8 = read8(pmcbase + GEN_PMCON_A);
-	if (on)
-		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
-	else
-		reg8 |= SLEEP_AFTER_POWER_FAIL;
-	write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
 static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
 {
 	uint32_t reg;

src/soc/intel/elkhartlake/pmutil.c

@@ -259,3 +259,20 @@ uint16_t get_pmbase(void)
 {
 	return (uint16_t) ACPI_BASE_ADDRESS;
 }
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+	uint8_t reg8;
+	uint8_t *const pmcbase = pmc_mmio_regs();
+
+	reg8 = read8(pmcbase + GEN_PMCON_A);
+	if (on)
+		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+	else
+		reg8 |= SLEEP_AFTER_POWER_FAIL;
+	write8(pmcbase + GEN_PMCON_A, reg8);
+}

src/soc/intel/icelake/Makefile.inc

@@ -44,7 +44,6 @@ ramstage-y += me.c
 
 smm-y += gpio.c
 smm-y += p2sb.c
-smm-y += pmc.c
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += uart.c

src/soc/intel/icelake/pmc.c

@@ -11,23 +11,6 @@
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
 
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
-	uint8_t reg8;
-	uint8_t *const pmcbase = pmc_mmio_regs();
-
-	reg8 = read8(pmcbase + GEN_PMCON_A);
-	if (on)
-		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
-	else
-		reg8 |= SLEEP_AFTER_POWER_FAIL;
-	write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
 static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
 {
 	uint32_t reg;

src/soc/intel/icelake/pmutil.c

@@ -259,3 +259,20 @@ uint16_t get_pmbase(void)
 {
 	return (uint16_t) ACPI_BASE_ADDRESS;
 }
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+	uint8_t reg8;
+	uint8_t *const pmcbase = pmc_mmio_regs();
+
+	reg8 = read8(pmcbase + GEN_PMCON_A);
+	if (on)
+		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+	else
+		reg8 |= SLEEP_AFTER_POWER_FAIL;
+	write8(pmcbase + GEN_PMCON_A, reg8);
+}

src/soc/intel/jasperlake/Makefile.inc

@@ -47,7 +47,6 @@ ramstage-y += xhci.c
 
 smm-y += gpio.c
 smm-y += p2sb.c
-smm-y += pmc.c
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += uart.c

src/soc/intel/jasperlake/pmc.c

@@ -11,23 +11,6 @@
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
 
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
-	uint8_t reg8;
-	uint8_t *const pmcbase = pmc_mmio_regs();
-
-	reg8 = read8(pmcbase + GEN_PMCON_A);
-	if (on)
-		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
-	else
-		reg8 |= SLEEP_AFTER_POWER_FAIL;
-	write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
 static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
 {
 	uint32_t reg;

src/soc/intel/jasperlake/pmutil.c

@@ -259,3 +259,20 @@ uint16_t get_pmbase(void)
 {
 	return (uint16_t) ACPI_BASE_ADDRESS;
 }
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+	uint8_t reg8;
+	uint8_t *const pmcbase = pmc_mmio_regs();
+
+	reg8 = read8(pmcbase + GEN_PMCON_A);
+	if (on)
+		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+	else
+		reg8 |= SLEEP_AFTER_POWER_FAIL;
+	write8(pmcbase + GEN_PMCON_A, reg8);
+}

src/soc/intel/skylake/Makefile.inc

@@ -32,7 +32,6 @@ romstage-y += gpio.c
 romstage-y += gspi.c
 romstage-y += i2c.c
 romstage-y += me.c
-romstage-y += pmc.c
 romstage-y += pmutil.c
 romstage-y += reset.c
 romstage-y += spi.c
@@ -66,7 +65,6 @@ ramstage-y += xhci.c
 smm-y += elog.c
 smm-y += gpio.c
 smm-y += p2sb.c
-smm-y += pmc.c
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += uart.c

src/soc/intel/skylake/pmc.c

@@ -14,28 +14,6 @@
 
 #include "chip.h"
 
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
-	uint8_t reg8;
-#if defined(__SIMPLE_DEVICE__)
-	const pci_devfn_t dev = PCH_DEV_PMC;
-#else
-	const struct device *const dev = PCH_DEV_PMC;
-#endif
-
-	reg8 = pci_read_config8(dev, GEN_PMCON_B);
-	if (on)
-		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
-	else
-		reg8 |= SLEEP_AFTER_POWER_FAIL;
-	pci_write_config8(dev, GEN_PMCON_B, reg8);
-}
-
-#if ENV_RAMSTAGE
 /* Fill up PMC resource structure */
 int pmc_soc_get_resources(struct pmc_resource_config *cfg)
 {
@@ -166,5 +144,3 @@ static void pm1_handle_wake_pin(void *unused)
 
 BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
 BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
-
-#endif

src/soc/intel/skylake/pmutil.c

@@ -248,3 +248,20 @@ uint16_t get_pmbase(void)
 {
 	return ACPI_BASE_ADDRESS;
 }
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+	uint8_t reg8;
+	const pci_devfn_t dev = PCH_DEV_PMC;
+
+	reg8 = pci_read_config8(dev, GEN_PMCON_B);
+	if (on)
+		reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+	else
+		reg8 |= SLEEP_AFTER_POWER_FAIL;
+	pci_write_config8(dev, GEN_PMCON_B, reg8);
+}