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Spell Intel Cooper Lake-SP with a space 

Use the official spelling. [1]

[1]: https://ark.intel.com/content/www/us/en/ark/products/codename/189143/products-formerly-cooper-lake.html

Change-Id: I7dbd332600caa7c04fc4f6bac53880e832e97bda
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Paul Menzel 2021-11-09 08:09:40 +01:00 committed by Felix Held
parent 4b6ad4efe3
commit 5554226426
3 changed files with 3 additions and 3 deletions
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2
Documentation/releases/coreboot-4.14-relnotes.md
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@ -142,7 +142,7 @@ primarily to serve the needs of the server market.
coreboot support for Xeon-SP is in src/soc/intel/xeon_sp directory. coreboot support for Xeon-SP is in src/soc/intel/xeon_sp directory.
This release has support for SkyLake-SP (SKX-SP) which is the 2nd This release has support for SkyLake-SP (SKX-SP) which is the 2nd
generation, and for CooperLake-SP (CPX-SP) which is the 3rd generation generation, and for Cooper Lake-SP (CPX-SP) which is the 3rd generation
or the latest generation [2] on market. or the latest generation [2] on market.
With this release, the codebase for multiple generations of Xeon-SP With this release, the codebase for multiple generations of Xeon-SP

2
src/soc/intel/xeon_sp/Kconfig
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@ -20,7 +20,7 @@ config SOC_INTEL_COOPERLAKE_SP
select PLATFORM_USES_FSP2_2 select PLATFORM_USES_FSP2_2
select CACHE_MRC_SETTINGS select CACHE_MRC_SETTINGS
help help
Intel Cooperlake-SP support Intel Cooper Lake-SP support
if XEON_SP_COMMON_BASE if XEON_SP_COMMON_BASE

2
src/soc/intel/xeon_sp/cpx/chip.c
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@ -186,7 +186,7 @@ static void chip_init(void *data)
} }
struct chip_operations soc_intel_xeon_sp_cpx_ops = { struct chip_operations soc_intel_xeon_sp_cpx_ops = {
CHIP_NAME("Intel Cooperlake-SP") CHIP_NAME("Intel Cooper Lake-SP")
.enable_dev = chip_enable_dev, .enable_dev = chip_enable_dev,
.init = chip_init, .init = chip_init,
.final = chip_final, .final = chip_final,