mb/intel/mtlrvp: Add files required for ramstage and SMM

This patch adds files required for ramstage and SMM.
1. Add file required for ramstage (mainboard.c)
2. Add smihandler.c for SMM

BUG=b:224325352
TEST=Able to build with the patch and boot the mtlrvp platform with the
subsequent patches in the train

Signed-off-by: Harsha B R <harsha.b.r@intel.com>
Change-Id: I377c4ff954a900c7b5193d7cab5554c6c02573ee
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70723
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Usha P <usha.p@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Harsha B R 2022-12-13 13:26:47 +05:30 committed by Felix Held
parent 071d7f3cef
commit 63444c7739
3 changed files with 78 additions and 0 deletions

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@ -1,6 +1,9 @@
## SPDX-License-Identifier: GPL-2.0-or-later ## SPDX-License-Identifier: GPL-2.0-or-later
ramstage-y += ec.c ramstage-y += ec.c
ramstage-y += mainboard.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR)) BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR))

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@ -0,0 +1,45 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/device.h>
#include <drivers/intel/gma/opregion.h>
#include <ec/ec.h>
#include <ec/intel/board_id.h>
#include <soc/ramstage.h>
#include <smbios.h>
#include <stdint.h>
#include <string.h>
const char *smbios_system_sku(void)
{
static char sku_str[7] = "";
uint8_t sku_id = get_rvp_board_id();
snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id);
return sku_str;
}
const char *mainboard_vbt_filename(void)
{
return "vbt.bin";
}
void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *cfg)
{
/* TODO: Update mainboard */
}
static void mainboard_init(void *chip_info)
{
if (CONFIG(EC_GOOGLE_CHROMEEC))
mainboard_ec_init();
}
static void mainboard_enable(struct device *dev)
{
/* TODO: Enable mainboard */
}
struct chip_operations mainboard_ops = {
.init = mainboard_init,
.enable_dev = mainboard_enable,
};

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@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <cpu/x86/smm.h>
#include <ec/google/chromeec/smm.h>
#include <intelblocks/smihandler.h>
#include <baseboard/ec.h>
void mainboard_smi_espi_handler(void)
{
if (!CONFIG(EC_GOOGLE_CHROMEEC))
return;
chromeec_smi_process_events();
}
void mainboard_smi_sleep(u8 slp_typ)
{
if (!CONFIG(EC_GOOGLE_CHROMEEC))
return;
chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
}
int mainboard_smi_apmc(u8 apmc)
{
if (CONFIG(EC_GOOGLE_CHROMEEC))
chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
return 0;
}