placeholder crap for sio
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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/* $Id$ */
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/* Copyright 2000 AG Electronics Ltd. */
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/* This code is distributed without warranty under the GPL v2 (see COPYING) */
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#include <types.h>
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#include <arch/io.h>
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#ifndef PNP_INDEX_REG
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#define PNP_INDEX_REG 0x15C
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#endif
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#ifndef PNP_DATA_REG
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#define PNP_DATA_REG 0x15D
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#endif
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#ifndef SIO_COM1
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#define SIO_COM1_BASE 0x3F8
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#endif
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#ifndef SIO_COM2
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#define SIO_COM2_BASE 0x2F8
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#endif
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static
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void pnp_output(char address, char data)
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{
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outb(address, PNP_INDEX_REG);
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outb(data, PNP_DATA_REG);
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}
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static
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void sio_enable(void)
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{
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/* Enable Super IO Chip */
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pnp_output(0x07, 6); /* LD 6 = UART1 */
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pnp_output(0x30, 0); /* Dectivate */
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pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */
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pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */
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pnp_output(0x30, 1); /* Activate */
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}
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struct superio_control superio_NSC_pc87360_control = {
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pre_pci_init: (void *)0,
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init: (void *)0,
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finishup: (void *)0,
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defaultport: SIO_COM1_BASE,
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name: "NSC pc87360"
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};
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