vboot2: add verstage

This reverts the revert commit 5780d6f387
and fixes the build issue that cuased it to be reverted.

Verstage will host vboot2 for firmware verification.
It's a stage in the sense that it has its own set of toolchains,
compiler flags,
and includes. This allows us to easily add object files as needed. But
it's directly linked to bootblock. This allows us to avoid code
duplication for stage loading and jumping (e.g. cbfs driver) for the
boards
where bootblock has to run in a different architecture (e.g. Tegra124).
To avoid name space conflict, verstage symbols are prefixed with
verstage_.

TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze.
BUG=None
BRANCH=none

Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac
Original-Reviewed-on: https://chromium-review.googlesource.com/204376
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>

(cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I2a83b87c29d98d97ae316091cf3ed7b024e21daf
Reviewed-on: http://review.coreboot.org/8224
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

Makefile.inc

@@ -75,7 +75,7 @@ subdirs-y += site-local
 
 #######################################################################
 # Add source classes and their build options
-classes-y := ramstage romstage bootblock smm smmstub cpu_microcode
+classes-y := ramstage romstage bootblock smm smmstub cpu_microcode verstage
 
 # Add dynamic classes for rmodules
 $(foreach supported_arch,$(ARCH_SUPPORTED), \
@@ -128,6 +128,8 @@ ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \
 	$(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_ramstage) -o $$@ -r $$^ ) \
 	$(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs))))
 
+verstage-c-ccopts:=-D__PRE_RAM__ -D__VER_STAGE__
+verstage-S-ccopts:=-D__PRE_RAM__ -D__VER_STAGE__
 romstage-c-ccopts:=-D__PRE_RAM__
 romstage-S-ccopts:=-D__PRE_RAM__
 ifeq ($(CONFIG_TRACE),y)
@@ -162,6 +164,7 @@ endif
 
 ramstage-c-deps:=$$(OPTION_TABLE_H)
 romstage-c-deps:=$$(OPTION_TABLE_H)
+verstage-c-deps:=$$(OPTION_TABLE_H)
 bootblock-c-deps:=$$(OPTION_TABLE_H)
 smm-c-deps:=$$(OPTION_TABLE_H)
 
@@ -374,6 +377,10 @@ $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) $(romstage-c-ccopts) -c -o $@ $<
 
+$(obj)/%.verstage.o $(abspath $(obj))/%.verstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+	$(CC_verstage) -MMD $(CFLAGS_verstage) $(verstage-c-ccopts) -c -o $@ $<
+
 $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $<

src/arch/arm/Kconfig

@@ -3,6 +3,10 @@ config ARCH_BOOTBLOCK_ARM
 	default n
 	select ARCH_ARM
 
+config ARCH_VERSTAGE_ARM
+	bool
+	default n
+
 config ARCH_ROMSTAGE_ARM
 	bool
 	default n

src/arch/arm/Makefile.inc

@@ -61,7 +61,7 @@ bootblock-y += memcpy.S
 bootblock-y += memmove.S
 bootblock-y += div0.c
 
-$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs)
+$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $$(VERSTAGE_LIB)
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
 	$(LD_bootblock) --gc-sections -static -o $@ -L$(obj) --start-group $(bootblock-objs) --end-group -T $(src)/arch/arm/bootblock.ld
 

src/arch/arm/armv4/Kconfig

@@ -2,6 +2,10 @@ config ARCH_BOOTBLOCK_ARMV4
 	def_bool n
 	select ARCH_BOOTBLOCK_ARM
 
+config ARCH_VERSTAGE_ARMV4
+	def_bool n
+	select ARCH_VERSTAGE_ARM
+
 config ARCH_ROMSTAGE_ARMV4
 	def_bool n
 	select ARCH_ROMSTAGE_ARM

src/arch/arm/armv7/Kconfig

@@ -2,6 +2,10 @@ config ARCH_BOOTBLOCK_ARMV7
 	def_bool n
 	select ARCH_BOOTBLOCK_ARM
 
+config ARCH_VERSTAGE_ARMV7
+	def_bool n
+	select ARCH_VERSTAGE_ARM
+
 config ARCH_ROMSTAGE_ARMV7
 	def_bool n
 	select ARCH_ROMSTAGE_ARM

src/arch/arm64/Kconfig

@@ -3,6 +3,10 @@ config ARCH_BOOTBLOCK_ARM64
 	default n
 	select ARCH_ARM64
 
+config ARCH_VERSTAGE_ARM64
+	bool
+	default n
+
 config ARCH_ROMSTAGE_ARM64
 	bool
 	default n

src/arch/arm64/armv8/Kconfig

@@ -2,6 +2,10 @@ config ARCH_BOOTBLOCK_ARMV8_64
 	def_bool n
 	select ARCH_BOOTBLOCK_ARM64
 
+config ARCH_VERSTAGE_ARMV8_64
+	def_bool n
+	select ARCH_VERSTAGE_ARM64
+
 config ARCH_ROMSTAGE_ARMV8_64
 	def_bool n
 	select ARCH_ROMSTAGE_ARM64

src/arch/riscv/Kconfig

@@ -3,6 +3,10 @@ config ARCH_BOOTBLOCK_RISCV
 	default n
 	select ARCH_RISCV
 
+config ARCH_VERSTAGE_RISCV
+	bool
+	default n
+
 config ARCH_ROMSTAGE_RISCV
 	bool
 	default n

src/arch/x86/Kconfig

@@ -3,6 +3,10 @@ config ARCH_BOOTBLOCK_X86_32
 	default n
 	select ARCH_X86
 
+config ARCH_VERSTAGE_X86_32
+	bool
+	default n
+
 config ARCH_ROMSTAGE_X86_32
 	bool
 	default n

src/cpu/allwinner/a10/Kconfig

@@ -7,6 +7,7 @@ if CPU_ALLWINNER_A10
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select HAVE_MONOTONIC_TIMER

src/cpu/amd/agesa/Kconfig

@@ -28,6 +28,7 @@ config CPU_AMD_AGESA
 	default y if CPU_AMD_AGESA_FAMILY16_KB
 	default n
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select TSC_SYNC_LFENCE

src/cpu/amd/geode_gx2/Kconfig

@@ -20,6 +20,7 @@
 config CPU_AMD_GEODE_GX2
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 

src/cpu/amd/geode_lx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_AMD_GEODE_LX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 

src/cpu/amd/model_10xxx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_AMD_MODEL_10XXX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SSE

src/cpu/amd/model_fxx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_AMD_MODEL_FXX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select MMX

src/cpu/amd/pi/Kconfig

@@ -22,6 +22,7 @@ config CPU_AMD_PI
 	default y if CPU_AMD_PI_00730F01
 	default n
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select TSC_SYNC_LFENCE

src/cpu/armltd/cortex-a9/Kconfig

@@ -1,6 +1,7 @@
 config CPU_ARMLTD_CORTEX_A9
 	bool
 	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	default n

src/cpu/dmp/vortex86ex/Kconfig

@@ -20,6 +20,7 @@
 config CPU_DMP_VORTEX86EX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select UDELAY_TSC

src/cpu/intel/ep80579/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_EP80579
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SSE

src/cpu/intel/fsp_model_206ax/Kconfig

@@ -30,6 +30,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select PLATFORM_USES_FSP
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/fsp_model_406dx/Kconfig

@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select PLATFORM_USES_FSP
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/haswell/Kconfig

@@ -7,6 +7,7 @@ if CPU_INTEL_HASWELL
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select BACKUP_DEFAULT_SMM_REGION

src/cpu/intel/model_1067x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_1067X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_106cx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_106CX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_2065x/Kconfig

@@ -6,6 +6,7 @@ if CPU_INTEL_MODEL_2065X
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_206ax/Kconfig

@@ -9,6 +9,7 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_65x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_65X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_67x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_67X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_68x/Kconfig

@@ -21,6 +21,7 @@
 config CPU_INTEL_MODEL_68X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_69x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_69X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_6bx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6BX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_6dx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6DX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_6ex/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6EX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_6fx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6FX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_6xx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6XX
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_f0x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F0X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_f1x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F1X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_f2x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F2X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_f3x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F3X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/intel/model_f4x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F4X
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select SMP

src/cpu/qemu-x86/Kconfig

@@ -20,5 +20,6 @@
 config CPU_QEMU_X86
 	bool
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32

src/cpu/ti/am335x/Kconfig

@@ -1,5 +1,6 @@
 config CPU_TI_AM335X
 	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select HAVE_MONOTONIC_TIMER

src/cpu/via/c3/Kconfig

@@ -6,6 +6,7 @@ if CPU_VIA_C3
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select UDELAY_TSC

src/cpu/via/c7/Kconfig

@@ -6,6 +6,7 @@ if CPU_VIA_C7
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select UDELAY_TSC

src/cpu/via/nano/Kconfig

@@ -25,6 +25,7 @@ if CPU_VIA_NANO
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select UDELAY_TSC

src/mainboard/bifferos/bifferboard/Kconfig

@@ -3,6 +3,7 @@ if BOARD_BIFFEROS_BIFFERBOARD
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select ROMCC

src/soc/intel/baytrail/Kconfig

@@ -8,6 +8,7 @@ if SOC_INTEL_BAYTRAIL
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select BACKUP_DEFAULT_SMM_REGION

src/soc/intel/broadwell/Kconfig

@@ -8,6 +8,7 @@ if SOC_INTEL_BROADWELL
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select ALT_CBFS_LOAD_PAYLOAD

src/soc/intel/fsp_baytrail/Kconfig

@@ -28,6 +28,7 @@ if SOC_INTEL_FSP_BAYTRAIL
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select DYNAMIC_CBMEM

src/soc/nvidia/tegra124/Kconfig

@@ -2,6 +2,7 @@ config SOC_NVIDIA_TEGRA124
 	bool
 	default n
 	select ARCH_BOOTBLOCK_ARMV4
+	select ARCH_VERSTAGE_ARMV4
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select HAVE_UART_SPECIAL

src/soc/nvidia/tegra124/Makefile.inc

@@ -20,6 +20,8 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
 bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
 endif
 
+verstage-y += verstage.c
+
 romstage-y += cbfs.c
 romstage-y += cbmem.c
 romstage-y += clock.c

src/soc/nvidia/tegra124/bootblock.c

@@ -23,9 +23,9 @@
 #include <console/console.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
-
 #include "pinmux.h"
 #include "power.h"
+#include "verstage.h"
 
 void main(void)
 {
@@ -72,6 +72,9 @@ void main(void)
 	power_enable_cpu_rail();
 	power_ungate_cpu();
 
+	if (IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE))
+		entry = (void *)verstage_vboot_main;
+	else
 		entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage");
 
 	if (entry)

src/soc/nvidia/tegra124/verstage.c

@@ -0,0 +1,9 @@
+#include "verstage.h"
+
+/**
+ * Stage entry point
+ */
+void vboot_main(void)
+{
+	for(;;);
+}

src/soc/nvidia/tegra124/verstage.h

@@ -0,0 +1,2 @@
+void vboot_main(void);
+void verstage_vboot_main(void);

src/soc/qualcomm/ipq806x/Kconfig

@@ -2,6 +2,7 @@ config SOC_QC_IPQ806X
 	bool
 	default n
 	select ARCH_BOOTBLOCK_ARMV4
+	select ARCH_VERSTAGE_ARMV4
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select ARM_LPAE

src/soc/samsung/exynos5250/Kconfig

@@ -1,5 +1,6 @@
 config CPU_SAMSUNG_EXYNOS5250
 	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select CPU_HAS_BOOTBLOCK_INIT

src/soc/samsung/exynos5420/Kconfig

@@ -1,5 +1,6 @@
 config CPU_SAMSUNG_EXYNOS5420
 	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
 	select CPU_HAS_BOOTBLOCK_INIT

src/soc/ucb/riscv/Kconfig

@@ -1,6 +1,7 @@
 config SOC_UCB_RISCV
 	select ARCH_RISCV
 	select ARCH_BOOTBLOCK_RISCV
+	select ARCH_VERSTAGE_RISCV
 	select ARCH_ROMSTAGE_RISCV
 	select ARCH_RAMSTAGE_RISCV
 	select DYNAMIC_CBMEM

src/vendorcode/google/chromeos/Kconfig

@@ -85,6 +85,14 @@ config VBOOT_VERIFY_FIRMWARE
 	  Enabling VBOOT_VERIFY_FIRMWARE will use vboot to verify the ramstage
 	  and boot loader.
 
+config VBOOT2_VERIFY_FIRMWARE
+  bool "Firmware Verification with vboot2"
+  default n
+  depends on CHROMEOS
+  help
+	  Enabling VBOOT2_VERIFY_FIRMWARE will use vboot2 to verify the romstage
+	  and boot loader.
+
 config EC_SOFTWARE_SYNC
 	bool "Enable EC software sync"
 	default n

src/vendorcode/google/chromeos/Makefile.inc

@@ -93,3 +93,12 @@ $(VB_LIB):
 		fwlib
 
 endif
+
+ifeq ($(CONFIG_VBOOT2_VERIFY_FIRMWARE),y)
+VERSTAGE_LIB = $(obj)/vendorcode/google/chromeos/verstage.a
+$(VERSTAGE_LIB): $$(verstage-objs)
+	@printf "    AR         $(subst $(obj)/,,$(@))\n"
+	$(AR_verstage) rc $@.tmp $(verstage-objs)
+	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+	$(OBJCOPY_verstage) --prefix-symbols=verstage_ $@.tmp $@
+endif

toolchain.inc

@@ -51,7 +51,7 @@ HOSTCXX:=CCC_CXX="$(HOSTCXX)" $(CXX)
 ROMCC=CCC_CC="$(ROMCC_BIN)" $(CC)
 endif
 
-COREBOOT_STANDARD_STAGES := bootblock romstage ramstage
+COREBOOT_STANDARD_STAGES := bootblock verstage romstage ramstage
 
 ARCHDIR-i386    := x86
 ARCHDIR-x86_32  := x86