util/intelmetool: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I3a00db217ce7acd11f979e64bb5d417a8bfc8717
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2020-04-28 09:46:42 +02:00 committed by Patrick Georgi
parent b30d054584
commit 7b2646536a
1 changed files with 4 additions and 4 deletions

View File

@ -574,7 +574,7 @@ int mkhi_debug_me_memory(void *physaddr)
uint32_t intel_mei_setup(struct pci_dev *dev)
{
struct mei_csr host;
uint32_t reg32;
uint16_t reg16;
uint32_t pagerounded;
mei_base_address = dev->base_addr[0] & ~0xf;
@ -588,9 +588,9 @@ uint32_t intel_mei_setup(struct pci_dev *dev)
}
/* Ensure Memory and Bus Master bits are set */
reg32 = pci_read_long(dev, PCI_COMMAND);
reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_long(dev, PCI_COMMAND, reg32);
reg16 = pci_read_word(dev, PCI_COMMAND);
reg16 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_word(dev, PCI_COMMAND, reg16);
/* Clean up status for next message */
read_host_csr(&host);