util/intelmetool: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I3a00db217ce7acd11f979e64bb5d417a8bfc8717 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40790 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -574,7 +574,7 @@ int mkhi_debug_me_memory(void *physaddr)
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uint32_t intel_mei_setup(struct pci_dev *dev)
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uint32_t intel_mei_setup(struct pci_dev *dev)
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{
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{
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struct mei_csr host;
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struct mei_csr host;
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uint32_t reg32;
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uint16_t reg16;
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uint32_t pagerounded;
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uint32_t pagerounded;
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mei_base_address = dev->base_addr[0] & ~0xf;
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mei_base_address = dev->base_addr[0] & ~0xf;
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@ -588,9 +588,9 @@ uint32_t intel_mei_setup(struct pci_dev *dev)
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}
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}
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/* Ensure Memory and Bus Master bits are set */
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/* Ensure Memory and Bus Master bits are set */
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reg32 = pci_read_long(dev, PCI_COMMAND);
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reg16 = pci_read_word(dev, PCI_COMMAND);
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reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
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reg16 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
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pci_write_long(dev, PCI_COMMAND, reg32);
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pci_write_word(dev, PCI_COMMAND, reg16);
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/* Clean up status for next message */
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/* Clean up status for next message */
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read_host_csr(&host);
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read_host_csr(&host);
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