mainboard/intel/cannonlake_rvp: Add PCI, PCIE IRQs to DSDT table
Change-Id: Id0b2b9e9ae2755ed89cee337a1a085fc4e95b073 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/21531 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
parent
67fb347668
commit
7f00965209
|
@ -28,6 +28,11 @@ DefinitionBlock(
|
||||||
#include <soc/intel/cannonlake/acpi/globalnvs.asl>
|
#include <soc/intel/cannonlake/acpi/globalnvs.asl>
|
||||||
|
|
||||||
Scope (\_SB) {
|
Scope (\_SB) {
|
||||||
|
Device (PCI0)
|
||||||
|
{
|
||||||
|
#include <soc/intel/cannonlake/acpi/northbridge.asl>
|
||||||
|
#include <soc/intel/cannonlake/acpi/southbridge.asl>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#if IS_ENABLED(CONFIG_CHROMEOS)
|
#if IS_ENABLED(CONFIG_CHROMEOS)
|
||||||
|
|
Loading…
Reference in New Issue