device/pci_ops: Move common pci_mmio_cfg.h
It is expected that method of accessing PCI configuration register space via memory-mapped region is arch-agnostic. Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31305 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -208,7 +208,7 @@ static __always_inline void write64(volatile void *addr,
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#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
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#include <arch/pci_io_cfg.h>
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#include <arch/pci_mmio_cfg.h>
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#include <device/pci_mmio_cfg.h>
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static __always_inline
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uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
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@ -16,7 +16,9 @@
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#ifndef _PCI_MMIO_CFG_H
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#define _PCI_MMIO_CFG_H
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#include <stdint.h>
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#include <arch/io.h>
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#include <device/pci_type.h>
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#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
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