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AGESA,binaryPI: Remove early_all_cores() 

This was implemented to make sure it gets called before
attempting any PCI MMIO access. Now that we have one
central romstage_main() implementation this extra precaution
is no longer useful.

Change-Id: I09b24da827e00d7a9ba0a51d5eef36f174b893a6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Kyösti Mälkki 2019-11-25 18:21:05 +02:00
parent 56397364c9
commit 9266ce90c6
3 changed files with 3 additions and 13 deletions
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2
src/drivers/amd/agesa/cache_as_ram.S
View File

@ -94,8 +94,6 @@ _cache_as_ram_setup:
#endif
call early_all_cores
/* Must maintain 16-byte stack alignment here. */
pushl $0x0
pushl $0x0

12
src/drivers/amd/agesa/romstage.c
View File

@ -27,15 +27,6 @@
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/agesa/state_machine.h>
#if !CONFIG(POSTCAR_STAGE)
#error "Only POSTCAR_STAGE is supported."
#endif
void asmlinkage early_all_cores(void)
{
amd_initmmio();
}
void __weak platform_once(struct sysinfo *cb)
{
board_BeforeAgesa(cb);
@ -57,6 +48,9 @@ void *asmlinkage romstage_main(unsigned long bist)
u8 initial_apic_id = (u8) (cpuid_ebx(1) >> 24);
int cbmem_initted = 0;
/* Enable PCI MMIO configuration. */
amd_initmmio();
fill_sysinfo(cb);
if ((initial_apic_id == 0) && boot_cpu()) {

2
src/include/cpu/amd/car.h
View File

@ -5,8 +5,6 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void asmlinkage early_all_cores(void);
void *asmlinkage romstage_main(unsigned long bist);
#endif