AGESA,binaryPI: Remove early_all_cores()
This was implemented to make sure it gets called before attempting any PCI MMIO access. Now that we have one central romstage_main() implementation this extra precaution is no longer useful. Change-Id: I09b24da827e00d7a9ba0a51d5eef36f174b893a6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37203 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
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@ -94,8 +94,6 @@ _cache_as_ram_setup:
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#endif
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#endif
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call early_all_cores
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/* Must maintain 16-byte stack alignment here. */
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/* Must maintain 16-byte stack alignment here. */
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pushl $0x0
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pushl $0x0
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pushl $0x0
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pushl $0x0
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@ -27,15 +27,6 @@
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#include <northbridge/amd/agesa/agesa_helper.h>
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#include <northbridge/amd/agesa/agesa_helper.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#if !CONFIG(POSTCAR_STAGE)
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#error "Only POSTCAR_STAGE is supported."
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#endif
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void asmlinkage early_all_cores(void)
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{
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amd_initmmio();
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}
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void __weak platform_once(struct sysinfo *cb)
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void __weak platform_once(struct sysinfo *cb)
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{
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{
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board_BeforeAgesa(cb);
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board_BeforeAgesa(cb);
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@ -57,6 +48,9 @@ void *asmlinkage romstage_main(unsigned long bist)
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u8 initial_apic_id = (u8) (cpuid_ebx(1) >> 24);
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u8 initial_apic_id = (u8) (cpuid_ebx(1) >> 24);
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int cbmem_initted = 0;
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int cbmem_initted = 0;
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/* Enable PCI MMIO configuration. */
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amd_initmmio();
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fill_sysinfo(cb);
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fill_sysinfo(cb);
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if ((initial_apic_id == 0) && boot_cpu()) {
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if ((initial_apic_id == 0) && boot_cpu()) {
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@ -5,8 +5,6 @@
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
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void asmlinkage early_all_cores(void);
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void *asmlinkage romstage_main(unsigned long bist);
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void *asmlinkage romstage_main(unsigned long bist);
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#endif
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#endif
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