soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabled

This change sets PCIEXPWAK_DIS in PM1_EN register if WAKE# pin is not
enabled on the platform. This is required to prevent unnecessary wakes
if the WAKE# pin remains not connected on the platform. Function to
set PCIEXPWAK_DIS gets called in normal boot path (BS_PAYLOAD_LOAD) as
well as S3 resume path (BS_OS_RESUME).

BUG=b:117284700
TEST=Verified that no spurious wakes are observed on nocturne.

Change-Id: Iea93baffc9bb703c0ffedacafc6a9a9410c7ebfe
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/28939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>

src/soc/intel/skylake/pmc.c

@@ -225,4 +225,29 @@ static void pm1_enable_pwrbtn_smi(void *unused)
 
 BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);
 
+/*
+ * Check if WAKE# pin is enabled based on DSX_EN_WAKE_PIN setting in
+ * deep_sx_config. If WAKE# pin is not enabled, then PCI Express Wake Disable
+ * bit needs to be set in PM1_EN to avoid unnecessary wakes caused by WAKE#
+ * pin.
+ */
+static void pm1_handle_wake_pin(void *unused)
+{
+	struct device *dev = SA_DEV_ROOT;
+
+	if (!dev || !dev->chip_info)
+		return;
+
+	const config_t *conf = dev->chip_info;
+
+	/* If WAKE# pin is enabled, bail out early. */
+	if (conf->deep_sx_config & DSX_EN_WAKE_PIN)
+		return;
+
+	pmc_update_pm1_enable(PCIEXPWAK_DIS);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
+
 #endif