soc/intel/fsp_broadwell_de: Set up LPC Generic Memory Range register
If mainboard devicetree config defines lpc_lgmr, use it to set up LPC Generic Memory Range register. Also set up 64KiB memory resource. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: Iec94f7364c332789f75c2562e910ea5db4ffad23 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51717 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -25,6 +25,8 @@
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struct soc_intel_fsp_broadwell_de_config {
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/* PCIe completion timeout value */
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int pcie_compltoval;
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/* LPC Generic Memory Range Register value */
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uint32_t lpc_lgmr;
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};
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typedef struct soc_intel_fsp_broadwell_de_config config_t;
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@ -28,6 +28,7 @@
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#include <pc80/i8259.h>
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#include <pc80/isa-dma.h>
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#include <soc/iomap.h>
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#include <soc/intel/common/block/lpc/lpc_def.h>
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#include <soc/irq.h>
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#include <soc/lpc.h>
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#include <soc/pci_devs.h>
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@ -216,6 +217,17 @@ static void sc_read_resources(struct device *dev)
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pci_dev_read_resources(dev);
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sc_add_mmio_resources(dev);
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sc_add_io_resources(dev);
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const config_t *config = config_of_soc();
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if (config->lpc_lgmr) {
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struct resource *res;
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res = new_resource(dev, LGMR);
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res->base = config->lpc_lgmr & ~(LPC_LGMR_EN);
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res->size = 64 * KiB;
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res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED
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| IORESOURCE_RESERVE;
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pci_write_config32(dev, LGMR, config->lpc_lgmr);
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}
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}
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static void sc_init(struct device *dev)
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