soc/intel/fsp_broadwell_de: Set up LPC Generic Memory Range register

If mainboard devicetree config defines lpc_lgmr, use it to
set up LPC Generic Memory Range register. Also set up
64KiB memory resource.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Iec94f7364c332789f75c2562e910ea5db4ffad23
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51717
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jonathan Zhang 2021-03-22 16:23:38 -07:00 committed by Patrick Georgi
parent 8b22c55855
commit 9f53477768
2 changed files with 14 additions and 0 deletions

View File

@ -25,6 +25,8 @@
struct soc_intel_fsp_broadwell_de_config {
/* PCIe completion timeout value */
int pcie_compltoval;
/* LPC Generic Memory Range Register value */
uint32_t lpc_lgmr;
};
typedef struct soc_intel_fsp_broadwell_de_config config_t;

View File

@ -28,6 +28,7 @@
#include <pc80/i8259.h>
#include <pc80/isa-dma.h>
#include <soc/iomap.h>
#include <soc/intel/common/block/lpc/lpc_def.h>
#include <soc/irq.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
@ -216,6 +217,17 @@ static void sc_read_resources(struct device *dev)
pci_dev_read_resources(dev);
sc_add_mmio_resources(dev);
sc_add_io_resources(dev);
const config_t *config = config_of_soc();
if (config->lpc_lgmr) {
struct resource *res;
res = new_resource(dev, LGMR);
res->base = config->lpc_lgmr & ~(LPC_LGMR_EN);
res->size = 64 * KiB;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED
| IORESOURCE_RESERVE;
pci_write_config32(dev, LGMR, config->lpc_lgmr);
}
}
static void sc_init(struct device *dev)