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amd/agesa/hudson boards: Get rid of power button device 

Port commit d7b88dcb (mb/google/x86-boards: Get rid of power button
device in coreboot) to AMD AGESA Hudson boards.

No idea, if this is correct for the two laptops. The Lenovo G505s also
incorrectly defines two power buttons.

    [    0.911423] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1
    [    0.911434] ACPI: Power Button [PWRB]
    [    0.911493] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2
    [    0.912326] ACPI: Power Button [PWRF]

If the generic power button device is needed, the POWER_BUTTON flag
should be set in FADT.

The GPE ACPI code seems to originate from commit 806def8c (I missed the
svn add on r3787. These are the additional files., Add AMD dbm690t ACPI
support.), and was copied over.

Change-Id: I88950e15faf1b90ca6e688864bac40bf9779c32e
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
This commit is contained in:
Paul Menzel 2020-04-27 13:55:47 +02:00 committed by Patrick Georgi
parent 76d55e5f00
commit 9f7f92c7ee
12 changed files with 0 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/amd/parmer/acpi/gpe.asl
View File

@ -5,7 +5,6 @@ Scope(\_GPE) { /* Start Scope GPE */
/* General event 3 */ /* General event 3 */
Method(_L03) { Method(_L03) {
/* DBGO("\\_GPE\\_L00\n") */ /* DBGO("\\_GPE\\_L00\n") */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Legacy PM event */ /* Legacy PM event */
@ -29,7 +28,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* ExtEvent0 SCI event */ /* ExtEvent0 SCI event */
@ -50,13 +48,11 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Azalia SCI event */ /* Azalia SCI event */
Method(_L1B) { Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */ /* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

7
src/mainboard/amd/parmer/dsdt.asl
View File

@ -38,13 +38,6 @@ DefinitionBlock (
/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */ /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
#include "acpi/routing.asl" #include "acpi/routing.asl"
Device(PWRB) {
Name(_HID, EISAID("PNP0C0C"))
Name(_UID, 0xAA)
Name(_PRW, Package () {3, 0x04})
Name(_STA, 0x0B)
}
Device(PCI0) { Device(PCI0) {
/* Describe the AMD Northbridge */ /* Describe the AMD Northbridge */
#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>

4
src/mainboard/amd/thatcher/acpi/gpe.asl
View File

@ -5,7 +5,6 @@ Scope(\_GPE) { /* Start Scope GPE */
/* General event 3 */ /* General event 3 */
Method(_L03) { Method(_L03) {
/* DBGO("\\_GPE\\_L00\n") */ /* DBGO("\\_GPE\\_L00\n") */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Legacy PM event */ /* Legacy PM event */
@ -29,7 +28,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* ExtEvent0 SCI event */ /* ExtEvent0 SCI event */
@ -50,13 +48,11 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Azalia SCI event */ /* Azalia SCI event */
Method(_L1B) { Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */ /* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

7
src/mainboard/amd/thatcher/dsdt.asl
View File

@ -38,13 +38,6 @@ DefinitionBlock (
/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */ /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
#include "acpi/routing.asl" #include "acpi/routing.asl"
Device(PWRB) {
Name(_HID, EISAID("PNP0C0C"))
Name(_UID, 0xAA)
Name(_PRW, Package () {3, 0x04})
Name(_STA, 0x0B)
}
Device(PCI0) { Device(PCI0) {
/* Describe the AMD Northbridge */ /* Describe the AMD Northbridge */
#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>

4
src/mainboard/asus/f2a85-m/acpi/gpe.asl
View File

@ -5,7 +5,6 @@ Scope(\_GPE) { /* Start Scope GPE */
/* General event 3 */ /* General event 3 */
Method(_L03) { Method(_L03) {
/* DBGO("\\_GPE\\_L00\n") */ /* DBGO("\\_GPE\\_L00\n") */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Legacy PM event */ /* Legacy PM event */
@ -29,7 +28,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* ExtEvent0 SCI event */ /* ExtEvent0 SCI event */
@ -47,13 +45,11 @@ Scope(\_GPE) { /* Start Scope GPE */
Method(_L18) { Method(_L18) {
/* DBGO("\\_GPE\\_L18\n") */ /* DBGO("\\_GPE\\_L18\n") */
Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Azalia SCI event */ /* Azalia SCI event */
Method(_L1B) { Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */ /* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

7
src/mainboard/asus/f2a85-m/dsdt.asl
View File

@ -38,13 +38,6 @@ DefinitionBlock (
/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */ /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
#include "acpi/routing.asl" #include "acpi/routing.asl"
Device(PWRB) {
Name(_HID, EISAID("PNP0C0C"))
Name(_UID, 0xAA)
Name(_PRW, Package () {3, 0x04})
Name(_STA, 0x0B)
}
Device(PCI0) { Device(PCI0) {
/* Describe the AMD Northbridge */ /* Describe the AMD Northbridge */
#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>

2
src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
View File

@ -23,7 +23,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH4, 0x02) Notify(\_SB.PCI0.UOH4, 0x02)
Notify(\_SB.PCI0.XHC0, 0x02) Notify(\_SB.PCI0.XHC0, 0x02)
Notify(\_SB.PCI0.UEH1, 0x02) Notify(\_SB.PCI0.UEH1, 0x02)
Notify(\_SB.PWRB, 0x02)
} }
/* ExtEvent0 SCI event */ /* ExtEvent0 SCI event */
@ -58,6 +57,5 @@ Scope(\_GPE) { /* Start Scope GPE */
Method(_L1B) { Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */ /* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

6
src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl
View File

@ -79,12 +79,6 @@ Scope (\_SB) {
} }
} }
Device(PWRB) {
Name(_HID, EisaId("PNP0C0C"))
Name(_UID, 0xAA)
Name(_STA, 0x0B)
}
Device (MB) { Device (MB) {
Name(_HID, EisaId("PNP0C01")) // System Board Name(_HID, EisaId("PNP0C01")) // System Board

2
src/mainboard/lenovo/g505s/acpi/gpe.asl
View File

@ -23,7 +23,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH4, 0x02) Notify(\_SB.PCI0.UOH4, 0x02)
Notify(\_SB.PCI0.XHC0, 0x02) Notify(\_SB.PCI0.XHC0, 0x02)
Notify(\_SB.PCI0.UEH1, 0x02) Notify(\_SB.PCI0.UEH1, 0x02)
Notify(\_SB.PWRB, 0x02)
} }
/* ExtEvent0 SCI event */ /* ExtEvent0 SCI event */
@ -58,6 +57,5 @@ Scope(\_GPE) { /* Start Scope GPE */
Method(_L1B) { Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */ /* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

6
src/mainboard/lenovo/g505s/acpi/mainboard.asl
View File

@ -79,12 +79,6 @@ Scope (\_SB) {
} }
} }
Device(PWRB) {
Name(_HID, EisaId("PNP0C0C"))
Name(_UID, 0xAA)
Name(_STA, 0x0B)
}
Device (MB) { Device (MB) {
Name(_HID, EisaId("PNP0C01")) // System Board Name(_HID, EisaId("PNP0C01")) // System Board

4
src/mainboard/msi/ms7721/acpi/gpe.asl
View File

@ -5,7 +5,6 @@ Scope(\_GPE) { /* Start Scope GPE */
/* General event 3 */ /* General event 3 */
Method(_L03) { Method(_L03) {
/* DBGO("\\_GPE\\_L00\n") */ /* DBGO("\\_GPE\\_L00\n") */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Legacy PM event */ /* Legacy PM event */
@ -29,7 +28,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* ExtEvent0 SCI event */ /* ExtEvent0 SCI event */
@ -47,13 +45,11 @@ Scope(\_GPE) { /* Start Scope GPE */
Method(_L18) { Method(_L18) {
/* DBGO("\\_GPE\\_L18\n") */ /* DBGO("\\_GPE\\_L18\n") */
Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
/* Azalia SCI event */ /* Azalia SCI event */
Method(_L1B) { Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */ /* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

7
src/mainboard/msi/ms7721/dsdt.asl
View File

@ -35,13 +35,6 @@ DefinitionBlock (
/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */ /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
#include "acpi/routing.asl" #include "acpi/routing.asl"
Device(PWRB) {
Name(_HID, EISAID("PNP0C0C"))
Name(_UID, 0xAA)
Name(_PRW, Package () {3, 0x04})
Name(_STA, 0x0B)
}
Device(PCI0) { Device(PCI0) {
/* Describe the AMD Northbridge */ /* Describe the AMD Northbridge */
#include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>