mb/intel/adlrvp: Update iDisp Link UPD settings
This changes updates the iDisp-Link T-mode to 8T required for ADL-M. The update is made because the HW on ADL now supports 8T mode. BUG=None TEST= build and boot ADL-M RVP and verify HDMI/DP audio playback. Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com> Change-Id: I9d0bf7dc76348f7e184e8496f042badc30bf3211 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51353 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
5f74818d39
commit
a0ca786a6e
|
@ -130,7 +130,7 @@ chip soc/intel/alderlake
|
|||
register "PchHdaAudioLinkSndwEnable[0]" = "1"
|
||||
register "PchHdaAudioLinkSndwEnable[1]" = "1"
|
||||
# iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T
|
||||
register "PchHdaIDispLinkTmode" = "2"
|
||||
register "PchHdaIDispLinkTmode" = "3"
|
||||
# iDisp-Link Freq 4: 96MHz, 3: 48MHz.
|
||||
register "PchHdaIDispLinkFrequency" = "4"
|
||||
# Not disconnected/enumerable
|
||||
|
|
Loading…
Reference in New Issue