mb/google/guybrush: select DISABLE_KEYBOARD_RESET_PIN
Now that we have the DISABLE_KEYBOARD_RESET_PIN Kconfig option, select
it and remove the temporary workaround that was implemented in the
mainboard code in commit 39ef890336
.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I634d11290dad8c93f10979f06243b1bf84737ae2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
parent
27b295b98b
commit
a228279ed7
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@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select AMD_SOC_CONSOLE_UART
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select BOARD_ROMSIZE_KB_16384
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select DISABLE_KEYBOARD_RESET_PIN
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select DISABLE_SPI_FLASH_ROM_SHARING
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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@ -1,11 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/amd_pci_util.h>
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#include <baseboard/variants.h>
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#include <device/device.h>
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#include <soc/acpi.h>
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#include <soc/southbridge.h>
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#include <variant/ec.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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@ -90,16 +88,6 @@ static void mainboard_configure_gpios(void)
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{
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size_t base_num_gpios, override_num_gpios;
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const struct soc_amd_gpio *base_gpios, *override_gpios;
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u32 reg;
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/*
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* Disable KBRST feature
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* KBRSTEN is set to 1 on reset and this causes system reset
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* if GPIO 129 is configured as GPO_LOW.
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* */
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reg = pm_read8(PM_RST_CTRL1);
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reg &= ~KBRSTEN;
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pm_write8(PM_RST_CTRL1, reg);
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base_gpios = variant_base_gpio_table(&base_num_gpios);
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override_gpios = variant_override_gpio_table(&override_num_gpios);
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