mb/google/brox: Remove use of EC_IN_RW_OD GPIO

Later GSCs don't need a EC_IN_RW GPIO anymore, so removing the use of
this for get_ec_is_trusted().

BUG=b:300690448
BRANCH=None
TEST=emerge-brox coreboot

Change-Id: I29f94969e9f2c1f239d9f9655f39b8410296f695
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Shelley Chen 2023-11-07 13:31:31 -08:00
parent a2bc2540c2
commit b14b08790f
2 changed files with 1 additions and 9 deletions

View File

@ -12,7 +12,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
@ -21,9 +21,3 @@ int get_write_protect_state(void)
{
return gpio_get(GPIO_PCH_WP);
}
int get_ec_is_trusted(void)
{
/* EC is trusted if not in RW. */
return !gpio_get(GPIO_EC_IN_RW);
}

View File

@ -12,8 +12,6 @@
#define GPE_EC_WAKE GPE0_DW2_17
/* WP signal to PCH */
#define GPIO_PCH_WP GPP_E15
/* EC in RW or RO */
#define GPIO_EC_IN_RW GPP_F18
/* Used to gate SoC's SLP_S0# signal */
#define GPIO_SLP_S0_GATE GPP_F9
/* GPIO IRQ for tight timestamps / wake support */