mb/google/brox: Remove use of EC_IN_RW_OD GPIO
Later GSCs don't need a EC_IN_RW GPIO anymore, so removing the use of this for get_ec_is_trusted(). BUG=b:300690448 BRANCH=None TEST=emerge-brox coreboot Change-Id: I29f94969e9f2c1f239d9f9655f39b8410296f695 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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2 changed files with 1 additions and 9 deletions
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@ -12,7 +12,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
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};
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};
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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}
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}
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@ -21,9 +21,3 @@ int get_write_protect_state(void)
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{
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{
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return gpio_get(GPIO_PCH_WP);
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return gpio_get(GPIO_PCH_WP);
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}
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}
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int get_ec_is_trusted(void)
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{
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/* EC is trusted if not in RW. */
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return !gpio_get(GPIO_EC_IN_RW);
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}
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@ -12,8 +12,6 @@
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#define GPE_EC_WAKE GPE0_DW2_17
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#define GPE_EC_WAKE GPE0_DW2_17
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/* WP signal to PCH */
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/* WP signal to PCH */
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#define GPIO_PCH_WP GPP_E15
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#define GPIO_PCH_WP GPP_E15
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/* EC in RW or RO */
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#define GPIO_EC_IN_RW GPP_F18
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/* Used to gate SoC's SLP_S0# signal */
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/* Used to gate SoC's SLP_S0# signal */
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#define GPIO_SLP_S0_GATE GPP_F9
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#define GPIO_SLP_S0_GATE GPP_F9
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/* GPIO IRQ for tight timestamps / wake support */
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/* GPIO IRQ for tight timestamps / wake support */
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