GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/intel/coffeelake_rvp: Update spd details as per Coffeelake board 

Update SPD details to match with Coffeelake U RVP board

BUG=none
BRANCH=none
TEST=Boot on coffelake U rvp board and check if memory training is
passing and board boots till payload.

Change-Id: I953354cf5c6045731262f4f4e9da230187c2d246
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Maulik V Vaghela 2018-08-07 14:42:57 +05:30 committed by Patrick Georgi
parent bad8fbb22c
commit b6f2e7bd4c
2 changed files with 16 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
src/mainboard/intel/coffeelake_rvp/romstage.c
View File

@ -27,7 +27,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
{
FSP_M_CONFIG *mem_cfg;
mem_cfg = &mupd->FspmConfig;
u8 spd_index;
mainboard_fill_dq_map_ch0(&mem_cfg->DqByteMapCh0);
mainboard_fill_dq_map_ch1(&mem_cfg->DqByteMapCh1);
@ -36,19 +35,13 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
mem_cfg->DqPinsInterleaved = 0;
mem_cfg->CaVrefConfig = 0; /* VREF_CA->CHA/CHB */
mem_cfg->DqPinsInterleaved = 1;
mem_cfg->CaVrefConfig = 2; /* VREF_CA->CHA/CHB */
mem_cfg->ECT = 1; /* Early Command Training Enabled */
spd_index = 2;
struct region_device spd_rdev;
if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
die("spd.bin not found\n");
mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev);
/* Memory leak is ok since we have memory mapped boot media */
mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
mem_cfg->RefClk = 0; /* Auto Select CLK freq */
mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
/* Setting standard SPD addresses */
mem_cfg->SpdAddressTable[0] = 0xA0;
mem_cfg->SpdAddressTable[1] = 0xA2;
mem_cfg->SpdAddressTable[2] = 0xA4;
mem_cfg->SpdAddressTable[3] = 0xA6;
}

28
src/mainboard/intel/coffeelake_rvp/spd/spd_util.c
View File

@ -23,8 +23,8 @@ void mainboard_fill_dq_map_ch0(void *dq_map_ptr)
{
/* DQ byte map Ch0 */
const u8 dq_map[12] = {
0x0F, 0xF0, 0x0F, 0xF0, 0xFF, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 };
memcpy(dq_map_ptr, dq_map, sizeof(dq_map));
}
@ -32,8 +32,8 @@ void mainboard_fill_dq_map_ch0(void *dq_map_ptr)
void mainboard_fill_dq_map_ch1(void *dq_map_ptr)
{
const u8 dq_map[12] = {
0x0F, 0xF0, 0x0F, 0xF0, 0xFF, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC,
0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 };
memcpy(dq_map_ptr, dq_map, sizeof(dq_map));
}
@ -41,27 +41,17 @@ void mainboard_fill_dq_map_ch1(void *dq_map_ptr)
void mainboard_fill_dqs_map_ch0(void *dqs_map_ptr)
{
/* DQS CPU<>DRAM map Ch0 */
const u8 dqs_map_u[8] = { 0, 3, 2, 1, 5, 6, 7, 4 };
const u8 dqs_map_h[8] = { 0, 1, 3, 2, 4, 5, 6, 7 };
const u8 dqs_map_y[8] = { 2, 0, 3, 1, 6, 5, 7, 4 };
if (IS_ENABLED(CONFIG_BOARD_INTEL_COFFEELAKE_RVPU))
memcpy(dqs_map_ptr, dqs_map_u, sizeof(dqs_map_u));
else
memcpy(dqs_map_ptr, dqs_map_y, sizeof(dqs_map_y));
memcpy(dqs_map_ptr, dqs_map_h, sizeof(dqs_map_h));
}
void mainboard_fill_dqs_map_ch1(void *dqs_map_ptr)
{
/* DQS CPU<>DRAM map Ch1 */
const u8 dqs_map_u[8] = { 3, 0, 1, 2, 5, 6, 4, 7 };
const u8 dqs_map_h[8] = { 1, 0, 4, 5, 2, 3, 6, 7 };
const u8 dqs_map_y[8] = { 3, 1, 2, 0, 4, 5, 6, 7 };
if (IS_ENABLED(CONFIG_BOARD_INTEL_COFFEELAKE_RVPU))
memcpy(dqs_map_ptr, dqs_map_u, sizeof(dqs_map_u));
else
memcpy(dqs_map_ptr, dqs_map_y, sizeof(dqs_map_y));
memcpy(dqs_map_ptr, dqs_map_h, sizeof(dqs_map_h));
}
void mainboard_fill_rcomp_res_data(void *rcomp_ptr)
@ -75,7 +65,7 @@ void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
{
/* Rcomp target */
static const u16 RcompTarget[RCOMP_TARGET_PARAMS] = {
80, 40, 40, 40, 30 };
100, 33, 32, 33, 28 };
memcpy(rcomp_strength_ptr, RcompTarget, sizeof(RcompTarget));
}