mb/intel/jasperlake_rvp: Enable audio
Enable audio for Jasper Lake RVP board. It has 2 Audio codec chips connected on I2C0: DA7219 and MAX98373 1. Enable Kconfig to enable I2C drivers for both chips. 2. Make necessary devicetree changes to enable FSP UPDs and ACPI entry for I2C0. 3. Enable audio related GPIO configurations. BUG=None BRANCH=None TEST=Checked that dmic and speaker are functional on Jasper Lake RVP Change-Id: Ibf76eb36c478bd33cbc0c86099236452b397fcc5 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39695 Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: V Sowmya <v.sowmya@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maulik V Vaghela
Subrata Banik
parent
9225fd5040
commit
d7564dc1b9
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@ -3,8 +3,10 @@ if BOARD_INTEL_JASPERLAKE_RVP || BOARD_INTEL_JASPERLAKE_RVP_EXT_EC
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_16384
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select DRIVERS_I2C_DA7219
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_MAX98373
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select DRIVERS_USB_ACPI
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select EC_ACPI
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select GENERIC_SPD_BIN
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@ -58,7 +58,11 @@ chip soc/intel/jasperlake
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register "gen3_dec" = "0x00fc0901"
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register "PchHdaDspEnable" = "1"
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register "PchHdaAudioLinkHdaEnable" = "1"
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register "PchHdaAudioLinkHdaEnable" = "0"
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register "PchHdaAudioLinkSspEnable[0]" = "1"
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register "PchHdaAudioLinkSspEnable[1]" = "1"
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register "PchHdaAudioLinkDmicEnable[0]" = "1"
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register "PchHdaAudioLinkDmicEnable[1]" = "1"
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# PCIe port 1 for M.2 E-key WLAN
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register "PcieRpEnable[1]" = "1"
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@ -128,6 +132,15 @@ chip soc/intel/jasperlake
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.speed_mhz = 1,
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.early_init = 1,
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},
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 176,
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.scl_hcnt = 95,
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.sda_hold = 36,
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}
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},
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}"
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device domain 0 on
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@ -233,14 +246,40 @@ chip soc/intel/jasperlake
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end
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device pci 14.5 on end # SDCard
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device pci 15.0 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ALPS0000""
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register "generic.desc" = ""Touchpad""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 2c on end
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end
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end # I2C 0
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chip drivers/i2c/max98373
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register "vmon_slot_no" = "4"
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register "imon_slot_no" = "5"
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register "uid" = "0"
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register "desc" = ""RIGHT SPEAKER AMP""
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register "name" = ""MAXR""
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device i2c 31 on end
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end
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chip drivers/i2c/max98373
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register "vmon_slot_no" = "6"
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register "imon_slot_no" = "7"
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register "uid" = "1"
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register "desc" = ""LEFT SPEAKER AMP""
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register "name" = ""MAXL""
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device i2c 32 on end
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end
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chip drivers/i2c/da7219
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
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register "btn_cfg" = "50"
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register "mic_det_thr" = "500"
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register "jack_ins_deb" = "20"
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register "jack_det_rate" = ""32ms_64ms""
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register "jack_rem_deb" = "1"
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register "a_d_btn_thr" = "0xa"
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register "d_b_btn_thr" = "0x16"
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register "b_c_btn_thr" = "0x21"
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register "c_mic_btn_thr" = "0x3e"
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register "btn_avg" = "4"
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register "adc_1bit_rpt" = "1"
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register "micbias_lvl" = "2600"
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register "mic_amp_in_sel" = ""diff""
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device i2c 1a on end
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end
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end # I2C 0 Audio
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device pci 15.1 on end # I2C #1
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device pci 15.2 on end # I2C #2
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device pci 15.3 on end # I2C #3
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@ -7,7 +7,57 @@
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/* Pad configuration in ramstage*/
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static const struct pad_config gpio_table[] = {
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/* ToDo: Fill gpio configuration */
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/* ToDo: Fill other gpio configuration */
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/* Audio related GPIOs */
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/* I2C0_SDA */
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PAD_CFG_NF(GPP_C16, UP_2K, DEEP, NF1),
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/* I2C0_SCL */
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PAD_CFG_NF(GPP_C17, UP_2K, DEEP, NF1),
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/* I2S_MCLK */
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PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
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/* I2S1_SCLK */
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PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
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/* Audio Jack Detection */
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PAD_CFG_GPI_INT(GPP_H16, NONE, PLTRST, EDGE_BOTH),
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/* I2S0_SCLK */
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PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2),
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/* I2S0_SFRM */
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PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2),
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/* I2S0_TXD */
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PAD_CFG_NF(GPP_R2, NONE, DEEP, NF2),
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/* I2S0_RXD */
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PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2),
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/* I2S1_RXD */
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PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2),
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/* I2S1_SFRM */
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PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2),
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/* I2S1_TXD */
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PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2),
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/* DMIC_CLK_1 */
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PAD_CFG_NF(GPP_S2, UP_20K, DEEP, NF2),
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/* DMIC_DATA_1 */
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PAD_CFG_NF(GPP_S3, UP_20K, DEEP, NF2),
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/* DMIC_CLK_0 */
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PAD_CFG_NF(GPP_S6, UP_20K, DEEP, NF2),
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/* DMIC_DATA_0 */
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PAD_CFG_NF(GPP_S7, UP_20K, DEEP, NF2),
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};
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/* Early pad configuration in bootblock */
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