google/kukui: Move some initialization from bootblock to verstage
MT8183 only allows booting from eMMC, so we have to do eMMC emulation from an external source, for example EC, which makes the size of bootblock very important. This CL moves some initialization steps from bootblock to verstage. This will save us about 2700 bytes (before compression) / 1024 bytes (after LZ4 compression) in bootblock. In case of CONFIG_VBOOT is disabled, these initialization steps will be done in romstage. BRANCH=none BUG=b:120588396 TEST=manually boot into kernel Change-Id: I9968d88c54283ef334d1ab975086d4adb3363bd6 Signed-off-by: You-Cheng Syu <youcheng@google.com> Reviewed-on: https://review.coreboot.org/c/30331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -2,18 +2,19 @@ subdirs-y += sdram_params/
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bootblock-y += boardid.c
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bootblock-y += bootblock.c
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bootblock-y += chromeos.c
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bootblock-y += memlayout.ld
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bootblock-y += reset.c
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decompressor-y += memlayout.ld
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verstage-y += chromeos.c
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verstage-y += early_init.c
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verstage-y += reset.c
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verstage-y += verstage.c
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verstage-y += memlayout.ld
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romstage-y += boardid.c
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romstage-y += chromeos.c
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romstage-y += early_init.c
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romstage-y += memlayout.ld
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romstage-y += reset.c
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romstage-y += romstage.c
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@ -14,28 +14,10 @@
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*/
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#include <bootblock_common.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <soc/mt8183.h>
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#include <soc/spi.h>
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#include "gpio.h"
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#define BOOTBLOCK_EN_L (GPIO(KPROW0))
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#define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
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void bootblock_mainboard_init(void)
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{
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mt8183_early_init();
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setup_chromeos_gpios();
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/* Turn on real eMMC. */
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gpio_output(BOOTBLOCK_EN_L, 1);
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/* Declare we are in S0 */
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gpio_output(AP_IN_SLEEP_L, 1);
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mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);
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mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz);
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}
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@ -0,0 +1,40 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2019 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <gpio.h>
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#include <soc/mt8183.h>
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#include <soc/spi.h>
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#include "early_init.h"
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#include "gpio.h"
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#define BOOTBLOCK_EN_L (GPIO(KPROW0))
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#define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
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void mainboard_early_init(void)
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{
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mt8183_early_init();
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/* Turn on real eMMC and allow communication to EC. */
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gpio_output(BOOTBLOCK_EN_L, 1);
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setup_chromeos_gpios();
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/* Declare we are in S0 */
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gpio_output(AP_IN_SLEEP_L, 1);
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mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz);
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gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
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}
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@ -0,0 +1,21 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2019 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MAINBOARD_GOOGLE_KUKUI_EARLY_INIT_H__
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#define __MAINBOARD_GOOGLE_KUKUI_EARLY_INIT_H__
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void mainboard_early_init(void);
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#endif
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@ -18,8 +18,14 @@
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#include <soc/mmu_operations.h>
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#include <soc/mt6358.h>
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#include "early_init.h"
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void platform_romstage_main(void)
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{
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/* This will be done in verstage if CONFIG_VBOOT is enabled. */
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if (!IS_ENABLED(CONFIG_VBOOT))
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mainboard_early_init();
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mt6358_init();
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mt_mem_init(get_sdram_config());
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mtk_mmu_after_dram();
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@ -14,13 +14,10 @@
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*/
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#include <security/vboot/vboot_common.h>
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#include <soc/gpio.h>
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#include <soc/spi.h>
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#include "gpio.h"
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#include "early_init.h"
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void verstage_mainboard_init(void)
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{
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mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz);
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gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
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mainboard_early_init();
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}
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@ -29,6 +29,7 @@ romstage-y += dramc_pi_basic_api.c
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romstage-y += dramc_pi_calibration_api.c
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romstage-y += memory.c
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romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c
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romstage-y += mt8183.c
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romstage-y += ../common/gpio.c gpio.c
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romstage-y += ../common/mmu_operations.c mmu_operations.c
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romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c
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